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authorAhmad Fatoum <a.fatoum@pengutronix.de>2020-03-26 23:02:06 +0100
committerAlexandre Torgue <alexandre.torgue@st.com>2020-04-20 12:15:23 +0200
commit9c32f980d999b4f441044f94005b3e649d036694 (patch)
tree0dce31a63cae11be5c80bee03555286989d52c19 /arch/arm/boot/dts/stm32mp157.dtsi
parent88fcb8a340e5221fdb0317a26f16d1df1776f0a9 (diff)
downloadlwn-9c32f980d999b4f441044f94005b3e649d036694.tar.gz
lwn-9c32f980d999b4f441044f94005b3e649d036694.zip
ARM: dts: stm32: preset stm32mp15x video #address- and #size-cells
The cell count for address and size is defined by the binding and not something a board would change. Avoid each board adding this boilerplate by having the cell size specification in the SoC DTSI. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Diffstat (limited to 'arch/arm/boot/dts/stm32mp157.dtsi')
-rw-r--r--arch/arm/boot/dts/stm32mp157.dtsi7
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/stm32mp157.dtsi b/arch/arm/boot/dts/stm32mp157.dtsi
index 5e733cd16ff9..54e73ccea446 100644
--- a/arch/arm/boot/dts/stm32mp157.dtsi
+++ b/arch/arm/boot/dts/stm32mp157.dtsi
@@ -24,7 +24,14 @@
clock-names = "pclk", "ref", "px_clk";
resets = <&rcc DSI_R>;
reset-names = "apb";
+ #address-cells = <1>;
+ #size-cells = <0>;
status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
};
};
};