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| author | Peter Griffin <peter.griffin@linaro.org> | 2015-09-28 14:37:00 +0200 |
|---|---|---|
| committer | Maxime Coquelin <maxime.coquelin@st.com> | 2015-09-30 10:03:47 +0200 |
| commit | 0f38d5ad1f25594c3ffc1cab33293de2b5fcb3e0 (patch) | |
| tree | d1b4419be626e3d88d336ee7cd3d0139510aa02d /arch/arm/boot/dts/stih407-pinctrl.dtsi | |
| parent | b771ae27bc72c7be48993872396c8f1d9a72b12d (diff) | |
| download | lwn-0f38d5ad1f25594c3ffc1cab33293de2b5fcb3e0.tar.gz lwn-0f38d5ad1f25594c3ffc1cab33293de2b5fcb3e0.zip | |
ARM: STi: DT: STiH407: Add a cec0 pin definition
This pin setup provides the correct configuration in order to
interact with the CEC HW.
Signed-off-by: Erwan Le Ray <erwan.leray@st.com>
Signed-off-by: Nicolas Vanhaelewyn <nicolas.vanhaelewyn@st.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Diffstat (limited to 'arch/arm/boot/dts/stih407-pinctrl.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/stih407-pinctrl.dtsi | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/stih407-pinctrl.dtsi b/arch/arm/boot/dts/stih407-pinctrl.dtsi index 1683debd0854..30db4538bba8 100644 --- a/arch/arm/boot/dts/stih407-pinctrl.dtsi +++ b/arch/arm/boot/dts/stih407-pinctrl.dtsi @@ -107,6 +107,14 @@ st,retime-pin-mask = <0x3f>; }; + cec0 { + pinctrl_cec0_default: cec0-default { + st,pins { + hdmi_cec = <&pio2 4 ALT1 BIDIR>; + }; + }; + }; + rc { pinctrl_ir: ir0 { st,pins { |