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authorDinh Nguyen <dinguyen@opensource.altera.com>2015-05-14 09:49:14 -0500
committerDinh Nguyen <dinguyen@opensource.altera.com>2015-06-02 14:18:06 -0500
commit479f8df04c4b7b1dd53b8c2e5b157b678c8a319c (patch)
tree7d768026ea94e016da437955ff6169447b7262b3 /arch/arm/boot/dts/socfpga_arria10.dtsi
parent030bbdbf4c833bc69f502eae58498bc5572db736 (diff)
downloadlwn-479f8df04c4b7b1dd53b8c2e5b157b678c8a319c.tar.gz
lwn-479f8df04c4b7b1dd53b8c2e5b157b678c8a319c.zip
ARM: socfpga: dts: add the a9-scu node for arria10
Add a dts node for the A9 SCU on the Arria10 platform. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Diffstat (limited to 'arch/arm/boot/dts/socfpga_arria10.dtsi')
-rw-r--r--arch/arm/boot/dts/socfpga_arria10.dtsi5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/socfpga_arria10.dtsi b/arch/arm/boot/dts/socfpga_arria10.dtsi
index 8a05c47fd57f..4cf0733b930b 100644
--- a/arch/arm/boot/dts/socfpga_arria10.dtsi
+++ b/arch/arm/boot/dts/socfpga_arria10.dtsi
@@ -281,6 +281,11 @@
reg = <0xffd05000 0x100>;
};
+ scu: snoop-control-unit@ffffc000 {
+ compatible = "arm,cortex-a9-scu";
+ reg = <0xffffc000 0x100>;
+ };
+
sysmgr: sysmgr@ffd06000 {
compatible = "altr,sys-mgr", "syscon";
reg = <0xffd06000 0x300>;