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author | Heiko Stuebner <heiko@sntech.de> | 2016-04-15 23:28:57 +0200 |
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committer | Heiko Stuebner <heiko@sntech.de> | 2016-04-15 23:28:57 +0200 |
commit | 4b91545072ad7ca1963d2a89c8b42fc2eb561484 (patch) | |
tree | f87f66b6d774d77cf78675d400f8f45eb35f6b21 /arch/arm/boot/dts/rk3288.dtsi | |
parent | 6e38e6b26e590b21247c1dd5238be35e7b056ef9 (diff) | |
download | lwn-4b91545072ad7ca1963d2a89c8b42fc2eb561484.tar.gz lwn-4b91545072ad7ca1963d2a89c8b42fc2eb561484.zip |
ARM: dts: rockchip: move rk3288 edp phy under the GRF
The edp-phy control is a part of the General Register Files and
with a recent patch in 4.6 the phy driver can now also handle this
correctly, so move the dts node under the GRF as well.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch/arm/boot/dts/rk3288.dtsi')
-rw-r--r-- | arch/arm/boot/dts/rk3288.dtsi | 17 |
1 files changed, 8 insertions, 9 deletions
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 180eb975ead5..906818955215 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -201,15 +201,6 @@ #clock-cells = <0>; }; - edp_phy: edp-phy { - compatible = "rockchip,rk3288-dp-phy"; - clocks = <&cru SCLK_EDP_24M>; - clock-names = "24m"; - rockchip,grf = <&grf>; - #phy-cells = <0>; - status = "disabled"; - }; - timer { compatible = "arm,armv7-timer"; arm,cpu-registers-not-fw-configured; @@ -756,6 +747,14 @@ grf: syscon@ff770000 { compatible = "rockchip,rk3288-grf", "syscon", "simple-mfd"; reg = <0xff770000 0x1000>; + + edp_phy: edp-phy { + compatible = "rockchip,rk3288-dp-phy"; + clocks = <&cru SCLK_EDP_24M>; + clock-names = "24m"; + #phy-cells = <0>; + status = "disabled"; + }; }; wdt: watchdog@ff800000 { |