diff options
| author | Heiko Stuebner <heiko@sntech.de> | 2015-07-15 23:03:09 +0200 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2015-07-16 22:22:47 +0200 |
| commit | 4863dcd394019b542ac968870cba734d27e992e0 (patch) | |
| tree | f9f27fe0205b7e858e25545db5e0eccb076af4d8 /arch/arm/boot/dts/rk3288.dtsi | |
| parent | 4a01a64c8ee8d205bbe25adb40bb3922d0ebce70 (diff) | |
| download | lwn-4863dcd394019b542ac968870cba734d27e992e0.tar.gz lwn-4863dcd394019b542ac968870cba734d27e992e0.zip | |
ARM: dts: rockchip: add rk3288 arm-pmu irq affinity
The rk3288 uses spi irqs for the arm-pmu on individual cpu cores, so needs
the affinity to them defined.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Sonny Rao <sonnyrao@chromium.org>
Diffstat (limited to 'arch/arm/boot/dts/rk3288.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/rk3288.dtsi | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 22e9221877c6..2db91c9ccac2 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -78,6 +78,7 @@ <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; + interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; }; cpus { @@ -110,19 +111,19 @@ clock-latency = <40000>; clocks = <&cru ARMCLK>; }; - cpu@501 { + cpu1: cpu@501 { device_type = "cpu"; compatible = "arm,cortex-a12"; reg = <0x501>; resets = <&cru SRST_CORE1>; }; - cpu@502 { + cpu2: cpu@502 { device_type = "cpu"; compatible = "arm,cortex-a12"; reg = <0x502>; resets = <&cru SRST_CORE2>; }; - cpu@503 { + cpu3: cpu@503 { device_type = "cpu"; compatible = "arm,cortex-a12"; reg = <0x503>; |