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| author | Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> | 2016-06-13 00:17:11 +0300 |
|---|---|---|
| committer | Simon Horman <horms+renesas@verge.net.au> | 2016-06-16 09:25:30 +0900 |
| commit | f80b6dfd5e56f3908832ce89f96ae94352b616c2 (patch) | |
| tree | 72e12363e660376e2cc0054157d8534b5f3374ed /arch/arm/boot/dts/r8a7792-blanche.dts | |
| parent | 4018fba454602cc1d01a216352935d88582353f1 (diff) | |
| download | lwn-f80b6dfd5e56f3908832ce89f96ae94352b616c2.tar.gz lwn-f80b6dfd5e56f3908832ce89f96ae94352b616c2.zip | |
ARM: dts: blanche: add Ethernet support
R8A7792 SoC doesn't have the EtherMAC core, so SMSC LAN89218 Ethernet
chip was used instead on the Blanche board; this chip is compatible with
SMSC LAN9115 for which there's a (device tree aware) driver. Describe
the chip in the Blanche device tree; enable DHCP and NFS root in the
kernel command line for the kernel booting.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/boot/dts/r8a7792-blanche.dts')
| -rw-r--r-- | arch/arm/boot/dts/r8a7792-blanche.dts | 23 |
1 files changed, 22 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/r8a7792-blanche.dts b/arch/arm/boot/dts/r8a7792-blanche.dts index e277d924441b..e7b40f0e7da6 100644 --- a/arch/arm/boot/dts/r8a7792-blanche.dts +++ b/arch/arm/boot/dts/r8a7792-blanche.dts @@ -22,7 +22,7 @@ }; chosen { - bootargs = "ignore_loglevel"; + bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp"; stdout-path = "serial0:115200n8"; }; @@ -30,6 +30,27 @@ device_type = "memory"; reg = <0 0x40000000 0 0x40000000>; }; + + d3_3v: regulator-3v3 { + compatible = "regulator-fixed"; + regulator-name = "D3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + ethernet@18000000 { + compatible = "smsc,lan89218", "smsc,lan9115"; + reg = <0 0x18000000 0 0x100>; + phy-mode = "mii"; + interrupt-parent = <&irqc>; + interrupts = <0 IRQ_TYPE_EDGE_FALLING>; + smsc,irq-push-pull; + reg-io-width = <4>; + vddvario-supply = <&d3_3v>; + vdd33a-supply = <&d3_3v>; + }; }; &extal_clk { |