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authorSergei Shtylyov <sergei.shtylyov@cogentembedded.com>2016-07-14 14:02:01 -0700
committerSimon Horman <horms+renesas@verge.net.au>2016-08-08 12:52:50 +0200
commit1d93a8b5a234282724f6f4a3113e1d32bea0ec71 (patch)
treea5cc0781da2323e40ff98b6c3076bab383c0962e /arch/arm/boot/dts/r8a7792-blanche.dts
parent2cd452d19e6e79ea58c8022c43248b64d579db60 (diff)
downloadlwn-1d93a8b5a234282724f6f4a3113e1d32bea0ec71.tar.gz
lwn-1d93a8b5a234282724f6f4a3113e1d32bea0ec71.zip
ARM: dts: blanche: add Ethernet pins
Add the (previously omitted) pin data for the SMSC LAN89218 Ethernet chip to the Blanche board's device tree: the chip's IRQ output is connected to the SoC's IRQ0 pin and its nCS input is connected to the SoC's EX_CS0# pin. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/boot/dts/r8a7792-blanche.dts')
-rw-r--r--arch/arm/boot/dts/r8a7792-blanche.dts14
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/r8a7792-blanche.dts b/arch/arm/boot/dts/r8a7792-blanche.dts
index 9b550bde939a..4777a609ff81 100644
--- a/arch/arm/boot/dts/r8a7792-blanche.dts
+++ b/arch/arm/boot/dts/r8a7792-blanche.dts
@@ -50,6 +50,9 @@
reg-io-width = <4>;
vddvario-supply = <&d3_3v>;
vdd33a-supply = <&d3_3v>;
+
+ pinctrl-0 = <&lan89218_pins>;
+ pinctrl-names = "default";
};
};
@@ -67,6 +70,17 @@
groups = "scif3_data";
function = "scif3";
};
+
+ lan89218_pins: lan89218 {
+ intc {
+ groups = "intc_irq0";
+ function = "intc";
+ };
+ lbsc {
+ groups = "lbsc_ex_cs0";
+ function = "lbsc";
+ };
+ };
};
&scif0 {