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| author | Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> | 2013-05-09 17:41:59 +0200 |
|---|---|---|
| committer | Simon Horman <horms+renesas@verge.net.au> | 2013-07-22 10:12:39 +0900 |
| commit | c4a003f6075c8e3e4e5a0d8958518882d779ef74 (patch) | |
| tree | 03950e727c6f7d7574b7a43e59f0fd106b98cdf0 /arch/arm/boot/dts/r8a7779-marzen-reference.dts | |
| parent | 0a4f788961f196baa3e8ffd840a2c5931434854e (diff) | |
| download | lwn-c4a003f6075c8e3e4e5a0d8958518882d779ef74.tar.gz lwn-c4a003f6075c8e3e4e5a0d8958518882d779ef74.zip | |
ARM: shmobile: marzen-reference: Move pinctrl mappings to device tree
Replace the pinctrl mappings in board code by device tree mappings.
For devices that are still instantiated from board code reference the
mappings as the default pin controller state to apply them at boot time.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/boot/dts/r8a7779-marzen-reference.dts')
| -rw-r--r-- | arch/arm/boot/dts/r8a7779-marzen-reference.dts | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/r8a7779-marzen-reference.dts b/arch/arm/boot/dts/r8a7779-marzen-reference.dts index 72be4c87cfb5..6d202478a139 100644 --- a/arch/arm/boot/dts/r8a7779-marzen-reference.dts +++ b/arch/arm/boot/dts/r8a7779-marzen-reference.dts @@ -37,6 +37,9 @@ lan0@18000000 { compatible = "smsc,lan9220", "smsc,lan9115"; reg = <0x18000000 0x100>; + pinctrl-0 = <&lan0_pins>; + pinctrl-names = "default"; + phy-mode = "mii"; interrupt-parent = <&gic>; interrupts = <0 28 0x4>; @@ -45,3 +48,35 @@ vdd33a-supply = <&fixedregulator3v3>; }; }; + +&pfc { + pinctrl-0 = <&scif2_pins &scif4_pins &sdhi0_pins>; + pinctrl-names = "default"; + + lan0_pins: lan0 { + intc { + renesas,groups = "intc_irq1_b"; + renesas,function = "intc"; + }; + lbsc { + renesas,groups = "lbsc_ex_cs0"; + renesas,function = "lbsc"; + }; + }; + + scif2_pins: scif2 { + renesas,groups = "scif2_data_c"; + renesas,function = "scif2"; + }; + + scif4_pins: scif4 { + renesas,groups = "scif4_data"; + renesas,function = "scif4"; + }; + + sdhi0_pins: sdhi0 { + renesas,groups = "sdhi0_data4", "sdhi0_ctrl", "sdhi0_cd", + "sdhi0_wp"; + renesas,function = "sdhi0"; + }; +}; |