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authorUlrich Hecht <ulrich.hecht+renesas@gmail.com>2015-02-26 17:42:11 +0100
committerSimon Horman <horms+renesas@verge.net.au>2015-03-01 11:03:31 +0900
commit39a96792c5d351e002fadbdaaba5fc0c20450f1d (patch)
treef8157d6e9b4f941ab6db0ae5d0ba4eb146849d21 /arch/arm/boot/dts/r8a7778.dtsi
parent95e7381b1a6dec04b17aea3fd839c4ada8c96f28 (diff)
downloadlwn-39a96792c5d351e002fadbdaaba5fc0c20450f1d.tar.gz
lwn-39a96792c5d351e002fadbdaaba5fc0c20450f1d.zip
ARM: shmobile: r8a7778: add sound to DT
Adds an entry for an R-Car Gen. 1 sound controller. Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> [horms: Removed undocumented "renesas,rcar_sound" compat string] Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/boot/dts/r8a7778.dtsi')
-rw-r--r--arch/arm/boot/dts/r8a7778.dtsi55
1 files changed, 55 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/r8a7778.dtsi b/arch/arm/boot/dts/r8a7778.dtsi
index 5d486b9390b8..868f97309533 100644
--- a/arch/arm/boot/dts/r8a7778.dtsi
+++ b/arch/arm/boot/dts/r8a7778.dtsi
@@ -227,6 +227,61 @@
status = "disabled";
};
+ rcar_sound: sound@ffd90000 {
+ #sound-dai-cells = <1>;
+ compatible = "renesas,rcar_sound-r8a7778", "renesas,rcar_sound-gen1";
+ reg = <0xffd90000 0x1000>, /* SRU */
+ <0xffd91000 0x1240>, /* SSI */
+ <0xfffe0000 0x24>; /* ADG */
+ clocks = <&mstp3_clks R8A7778_CLK_SSI8>,
+ <&mstp3_clks R8A7778_CLK_SSI7>,
+ <&mstp3_clks R8A7778_CLK_SSI6>,
+ <&mstp3_clks R8A7778_CLK_SSI5>,
+ <&mstp3_clks R8A7778_CLK_SSI4>,
+ <&mstp0_clks R8A7778_CLK_SSI3>,
+ <&mstp0_clks R8A7778_CLK_SSI2>,
+ <&mstp0_clks R8A7778_CLK_SSI1>,
+ <&mstp0_clks R8A7778_CLK_SSI0>,
+ <&mstp5_clks R8A7778_CLK_SRU_SRC8>,
+ <&mstp5_clks R8A7778_CLK_SRU_SRC7>,
+ <&mstp5_clks R8A7778_CLK_SRU_SRC6>,
+ <&mstp5_clks R8A7778_CLK_SRU_SRC5>,
+ <&mstp5_clks R8A7778_CLK_SRU_SRC4>,
+ <&mstp5_clks R8A7778_CLK_SRU_SRC3>,
+ <&mstp5_clks R8A7778_CLK_SRU_SRC2>,
+ <&mstp5_clks R8A7778_CLK_SRU_SRC1>,
+ <&mstp5_clks R8A7778_CLK_SRU_SRC0>,
+ <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
+ <&cpg_clocks R8A7778_CLK_S1>;
+ clock-names = "ssi.8", "ssi.7", "ssi.6", "ssi.5", "ssi.4",
+ "ssi.3", "ssi.2", "ssi.1", "ssi.0",
+ "src.8", "src.7", "src.6", "src.5", "src.4",
+ "src.3", "src.2", "src.1", "src.0",
+ "clk_a", "clk_b", "clk_c", "clk_i";
+
+ status = "disabled";
+
+ rcar_sound,src {
+ src3: src@3 { };
+ src4: src@4 { };
+ src5: src@5 { };
+ src6: src@6 { };
+ src7: src@7 { };
+ src8: src@8 { };
+ src9: src@9 { };
+ };
+
+ rcar_sound,ssi {
+ ssi3: ssi@3 { interrupts = <0 0x85 IRQ_TYPE_LEVEL_HIGH>; };
+ ssi4: ssi@4 { interrupts = <0 0x85 IRQ_TYPE_LEVEL_HIGH>; };
+ ssi5: ssi@5 { interrupts = <0 0x86 IRQ_TYPE_LEVEL_HIGH>; };
+ ssi6: ssi@6 { interrupts = <0 0x86 IRQ_TYPE_LEVEL_HIGH>; };
+ ssi7: ssi@7 { interrupts = <0 0x86 IRQ_TYPE_LEVEL_HIGH>; };
+ ssi8: ssi@8 { interrupts = <0 0x86 IRQ_TYPE_LEVEL_HIGH>; };
+ ssi9: ssi@9 { interrupts = <0 0x86 IRQ_TYPE_LEVEL_HIGH>; };
+ };
+ };
+
scif0: serial@ffe40000 {
compatible = "renesas,scif-r8a7778", "renesas,scif";
reg = <0xffe40000 0x100>;