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| author | Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> | 2016-01-29 10:47:32 +0100 |
|---|---|---|
| committer | Simon Horman <horms+renesas@verge.net.au> | 2016-02-09 19:43:14 +0100 |
| commit | 92489120be987cb83a23d3c6ea013501f438c41e (patch) | |
| tree | 00103a6462a744d89bd064b78adf2f9ef3321a92 /arch/arm/boot/dts/r7s72100.dtsi | |
| parent | 46ae0e376b0dfe827ed7b675ff24a98d5f525c8a (diff) | |
| download | lwn-92489120be987cb83a23d3c6ea013501f438c41e.tar.gz lwn-92489120be987cb83a23d3c6ea013501f438c41e.zip | |
ARM: dts: r7s72100: Rename the serial port clock to fck
The clock is really the device functional clock, not the interface
clock. Rename it.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/boot/dts/r7s72100.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/r7s72100.dtsi | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/arch/arm/boot/dts/r7s72100.dtsi b/arch/arm/boot/dts/r7s72100.dtsi index a5938c72d5bd..89e46ebef1bc 100644 --- a/arch/arm/boot/dts/r7s72100.dtsi +++ b/arch/arm/boot/dts/r7s72100.dtsi @@ -158,7 +158,7 @@ <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp4_clks R7S72100_CLK_SCIF0>; - clock-names = "sci_ick"; + clock-names = "fck"; power-domains = <&cpg_clocks>; status = "disabled"; }; @@ -171,7 +171,7 @@ <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp4_clks R7S72100_CLK_SCIF1>; - clock-names = "sci_ick"; + clock-names = "fck"; power-domains = <&cpg_clocks>; status = "disabled"; }; @@ -184,7 +184,7 @@ <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp4_clks R7S72100_CLK_SCIF2>; - clock-names = "sci_ick"; + clock-names = "fck"; power-domains = <&cpg_clocks>; status = "disabled"; }; @@ -197,7 +197,7 @@ <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp4_clks R7S72100_CLK_SCIF3>; - clock-names = "sci_ick"; + clock-names = "fck"; power-domains = <&cpg_clocks>; status = "disabled"; }; @@ -210,7 +210,7 @@ <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp4_clks R7S72100_CLK_SCIF4>; - clock-names = "sci_ick"; + clock-names = "fck"; power-domains = <&cpg_clocks>; status = "disabled"; }; @@ -223,7 +223,7 @@ <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp4_clks R7S72100_CLK_SCIF5>; - clock-names = "sci_ick"; + clock-names = "fck"; power-domains = <&cpg_clocks>; status = "disabled"; }; @@ -236,7 +236,7 @@ <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp4_clks R7S72100_CLK_SCIF6>; - clock-names = "sci_ick"; + clock-names = "fck"; power-domains = <&cpg_clocks>; status = "disabled"; }; @@ -249,7 +249,7 @@ <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp4_clks R7S72100_CLK_SCIF7>; - clock-names = "sci_ick"; + clock-names = "fck"; power-domains = <&cpg_clocks>; status = "disabled"; }; |