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authorJonathan Marek <jonathan@marek.ca>2018-11-04 16:50:34 -0500
committerAndy Gross <andy.gross@linaro.org>2019-01-22 15:04:49 -0600
commitec4c6c57af576e10c70547b782db04eb3602f5f4 (patch)
treed96136b1858b24c8b39f7558316e867cb6ea3556 /arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts
parent57c23241be8490c9db5c1d8c4496e7f13f2236ae (diff)
downloadlwn-ec4c6c57af576e10c70547b782db04eb3602f5f4.tar.gz
lwn-ec4c6c57af576e10c70547b782db04eb3602f5f4.zip
ARM: dts: qcom: msm8974-hammerhead: add WiFi support
This patch adds WiFi support to the LG Nexus 5 (hammerhead) phone. Signed-off-by: Jonathan Marek <jonathan@marek.ca> [masneyb@onstation.org: Enabled wlan_regulator_pin and wlan_sleep_clk_pin] Signed-off-by: Brian Masney <masneyb@onstation.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts')
-rw-r--r--arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts70
1 files changed, 70 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts b/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts
index 51444c53fc72..5cf9c7e20f2e 100644
--- a/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts
+++ b/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts
@@ -220,6 +220,20 @@
};
};
};
+
+ vreg_wlan: wlan-regulator {
+ compatible = "regulator-fixed";
+
+ regulator-name = "wl-reg";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
+ gpio = <&msmgpio 26 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&wlan_regulator_pin>;
+ };
};
&soc {
@@ -242,6 +256,20 @@
};
};
+ sdhc2_pin_a: sdhc2-pin-active {
+ clk {
+ pins = "sdc2_clk";
+ drive-strength = <6>;
+ bias-disable;
+ };
+
+ cmd-data {
+ pins = "sdc2_cmd", "sdc2_data";
+ drive-strength = <6>;
+ bias-pull-up;
+ };
+ };
+
i2c3_pins: i2c3 {
mux {
pins = "gpio10", "gpio11";
@@ -283,6 +311,32 @@
pinctrl-0 = <&sdhc1_pin_a>;
};
+ sdhci@f98a4900 {
+ status = "ok";
+
+ max-frequency = <100000000>;
+ bus-width = <4>;
+ non-removable;
+ vmmc-supply = <&vreg_wlan>;
+ vqmmc-supply = <&pm8941_s3>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdhc2_pin_a>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ bcrmf@1 {
+ compatible = "brcm,bcm4339-fmac", "brcm,bcm4329-fmac";
+ reg = <1>;
+
+ brcm,drive-strength = <10>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&wlan_sleep_clk_pin>;
+ };
+ };
+
gpio-keys {
compatible = "gpio-keys";
input-name = "gpio-keys";
@@ -371,6 +425,22 @@
bias-pull-up;
power-source = <PM8941_GPIO_S3>;
};
+
+ wlan_sleep_clk_pin: wl-sleep-clk {
+ pins = "gpio16";
+ function = "func2";
+
+ output-high;
+ power-source = <PM8941_GPIO_S3>;
+ };
+
+ wlan_regulator_pin: wl-reg-active {
+ pins = "gpio17";
+ function = "normal";
+
+ bias-disable;
+ power-source = <PM8941_GPIO_S3>;
+ };
};
};
};