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author | Matthias Kaehlcke <mka@chromium.org> | 2018-12-19 15:55:28 -0800 |
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committer | Andy Gross <agross@kernel.org> | 2019-04-25 23:22:26 -0500 |
commit | 6969d1d9c61524d3ce492cfdca92d5dfa51e2e54 (patch) | |
tree | d7cf95198ddd9849185622ae4c7cc18bdd0bfb2b /arch/arm/boot/dts/qcom-apq8064.dtsi | |
parent | f3e35357cd460a8aeb48b8113dc4b761a7d5c828 (diff) | |
download | lwn-6969d1d9c61524d3ce492cfdca92d5dfa51e2e54.tar.gz lwn-6969d1d9c61524d3ce492cfdca92d5dfa51e2e54.zip |
ARM: dts: qcom-apq8064: Set 'cxo_board' as ref clock of the DSI PHY
Add 'xo_board' as ref clock for the DSI PHY, it was previously
hardcoded in the PLL 'driver' for the 28nm 8960 PHY.
Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Andy Gross <agross@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/qcom-apq8064.dtsi')
-rw-r--r-- | arch/arm/boot/dts/qcom-apq8064.dtsi | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi index 8ca89c79bd0e..65975df6a8c3 100644 --- a/arch/arm/boot/dts/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi @@ -1303,8 +1303,9 @@ <0x04700300 0x200>, <0x04700500 0x5c>; reg-names = "dsi_pll", "dsi_phy", "dsi_phy_regulator"; - clock-names = "iface_clk"; - clocks = <&mmcc DSI_M_AHB_CLK>; + clock-names = "iface_clk", "ref"; + clocks = <&mmcc DSI_M_AHB_CLK>, + <&cxo_board>; }; |