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| author | Robert Jarzmik <robert.jarzmik@free.fr> | 2015-02-07 13:13:24 +0100 |
|---|---|---|
| committer | Robert Jarzmik <robert.jarzmik@free.fr> | 2015-05-12 23:14:26 +0200 |
| commit | d96672e6207f09a25a9cc908400c1ac6f7a5190c (patch) | |
| tree | 167891ca0cdd8a7bf34225597bc6a6dafb9ba14f /arch/arm/boot/dts/pxa27x.dtsi | |
| parent | f374d1e7ef988bc23387079255924c262f4e6768 (diff) | |
| download | lwn-d96672e6207f09a25a9cc908400c1ac6f7a5190c.tar.gz lwn-d96672e6207f09a25a9cc908400c1ac6f7a5190c.zip | |
ARM: dts: pxa: add clocks
Add clocks to the IPs already described in the pxa device-tree
files. There are more clocks in the clock tree than IPs described in the
current pxa device-tree.
This patch ensures that :
- the current description is correct
- the clocks are actually claimed, so that clock framework doesn't
disable them automatically (unused clocks shutdown)
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Diffstat (limited to 'arch/arm/boot/dts/pxa27x.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/pxa27x.dtsi | 18 |
1 files changed, 14 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/pxa27x.dtsi b/arch/arm/boot/dts/pxa27x.dtsi index 98b560e76314..96967183d1a5 100644 --- a/arch/arm/boot/dts/pxa27x.dtsi +++ b/arch/arm/boot/dts/pxa27x.dtsi @@ -1,6 +1,6 @@ /* The pxa3xx skeleton simply augments the 2xx version */ #include "pxa2xx.dtsi" -#include "dt-bindings/clock/pxa2xx-clock.h" +#include "dt-bindings/clock/pxa-clock.h" / { model = "Marvell PXA27x familiy SoC"; @@ -12,36 +12,47 @@ marvell,intc-nr-irqs = <34>; }; + gpio: gpio@40e00000 { + compatible = "intel,pxa27x-gpio"; + clocks = <&clks CLK_NONE>; + }; + pwm0: pwm@40b00000 { compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm"; reg = <0x40b00000 0x10>; #pwm-cells = <1>; + clocks = <&clks CLK_PWM0>; }; pwm1: pwm@40b00010 { compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm"; reg = <0x40b00010 0x10>; #pwm-cells = <1>; + clocks = <&clks CLK_PWM1>; }; pwm2: pwm@40c00000 { compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm"; reg = <0x40c00000 0x10>; #pwm-cells = <1>; + clocks = <&clks CLK_PWM0>; }; pwm3: pwm@40c00010 { compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm"; reg = <0x40c00010 0x10>; #pwm-cells = <1>; + clocks = <&clks CLK_PWM1>; }; pwri2c: i2c@40f000180 { compatible = "mrvl,pxa-i2c"; reg = <0x40f00180 0x24>; interrupts = <6>; + clocks = <&clks CLK_PWRI2C>; status = "disabled"; }; + }; clocks { @@ -53,11 +64,10 @@ #size-cells = <1>; ranges; - pxa2xx_clks: pxa2xx_clks@41300004 { - compatible = "marvell,pxa-clocks"; + clks: pxa2xx_clks@41300004 { + compatible = "marvell,pxa270-clocks"; #clock-cells = <1>; status = "okay"; }; }; - }; |