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| author | Russell King <rmk+kernel@arm.linux.org.uk> | 2014-03-19 12:14:18 +0000 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2014-05-30 00:49:53 +0100 |
| commit | c95680e6f56d6bc345a7907c4d4bd985e875f2a7 (patch) | |
| tree | 1da00ec701c287645705c68c081795abdc13ddea /arch/arm/boot/dts/prima2.dtsi | |
| parent | d941f86fad41b8150f99f840250bafea7bd553c4 (diff) | |
| download | lwn-c95680e6f56d6bc345a7907c4d4bd985e875f2a7.tar.gz lwn-c95680e6f56d6bc345a7907c4d4bd985e875f2a7.zip | |
ARM: l2c: prima2: remove cache size override
The cache size should already be present in the L2 cache auxiliary
control register: it is part of the integration process to configure
the hardware IP. Most platforms get this right, yet still many
cargo-cult program, and assume that they always need specifying to
the L2 cache code. Remove them so we can find out which really need
this.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/boot/dts/prima2.dtsi')
0 files changed, 0 insertions, 0 deletions