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| author | Martin Blumenstingl <martin.blumenstingl@googlemail.com> | 2017-06-15 23:33:51 +0200 |
|---|---|---|
| committer | Kevin Hilman <khilman@baylibre.com> | 2017-06-16 12:07:11 -0700 |
| commit | d8dd3d29d02cb04f37098b10ede5251764f06754 (patch) | |
| tree | 988e431a487c010e9897edb95d1323ba6483c941 /arch/arm/boot/dts/meson8b.dtsi | |
| parent | e29b1cf87473811584c8cf02d624954d7784fa5a (diff) | |
| download | lwn-d8dd3d29d02cb04f37098b10ede5251764f06754.tar.gz lwn-d8dd3d29d02cb04f37098b10ede5251764f06754.zip | |
ARM: dts: meson8b: add the SCU device node
Amlogic's Meson8b SoC has a Snoop Control Unit (SCU), just like many
other Cortex-A5 SoCs. Add the corresponding devicetree node so it can be
used during SMP boot.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Diffstat (limited to 'arch/arm/boot/dts/meson8b.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/meson8b.dtsi | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi index 521be5dfa8ef..173b12a999e6 100644 --- a/arch/arm/boot/dts/meson8b.dtsi +++ b/arch/arm/boot/dts/meson8b.dtsi @@ -82,6 +82,11 @@ reg = <0x203>; }; }; + + scu@c4300000 { + compatible = "arm,cortex-a5-scu"; + reg = <0xc4300000 0x100>; + }; }; /* end of / */ &aobus { |