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| author | Ezequiel Garcia <ezequiel.garcia@free-electrons.com> | 2013-07-26 10:18:05 -0300 |
|---|---|---|
| committer | Jason Cooper <jason@lakedaemon.net> | 2013-08-06 14:11:53 +0000 |
| commit | 54397d85349f5b5c5f11f5eef431f9e86a338d16 (patch) | |
| tree | ac8bfe42574180161d1860f256dc8bbf648d92fd /arch/arm/boot/dts/kirkwood-nsa310.dts | |
| parent | 3ec81e7e0374734893941258c8cbb998a780c5eb (diff) | |
| download | lwn-54397d85349f5b5c5f11f5eef431f9e86a338d16.tar.gz lwn-54397d85349f5b5c5f11f5eef431f9e86a338d16.zip | |
ARM: kirkwood: Relocate PCIe device tree nodes
Now that mbus has been added to the device tree, it's possible to
move the PCIe nodes out of the ocp node, placing it directly
below the mbus. This is a more accurate representation of the hardware.
Moving the PCIe nodes, we now need to introduce an extra cell to
encode the window target ID and attribute. Since this depends on
the PCIe port, we split the ranges translation entries, to
correspond to each MBus window.
In addition, we encode the PCIe memory and I/O apertures in the MBus
node, according to the MBus DT binding specification. The choice made
is 0xe0000000-0xf0000000 for memory space, and 0xf200000-0xf2100000 for
I/O space. These apertures can be changed in each per-board DT file.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Diffstat (limited to 'arch/arm/boot/dts/kirkwood-nsa310.dts')
| -rw-r--r-- | arch/arm/boot/dts/kirkwood-nsa310.dts | 19 |
1 files changed, 11 insertions, 8 deletions
diff --git a/arch/arm/boot/dts/kirkwood-nsa310.dts b/arch/arm/boot/dts/kirkwood-nsa310.dts index 8fd683c34142..bd7f05f6aa96 100644 --- a/arch/arm/boot/dts/kirkwood-nsa310.dts +++ b/arch/arm/boot/dts/kirkwood-nsa310.dts @@ -16,6 +16,17 @@ bootargs = "console=ttyS0,115200"; }; + mbus { + ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>; + pcie-controller { + status = "okay"; + + pcie@1,0 { + status = "okay"; + }; + }; + }; + ocp@f1000000 { pinctrl: pinctrl@10000 { pinctrl-0 = <&pmx_unknown>; @@ -162,14 +173,6 @@ reg = <0x5040000 0x2fc0000>; }; }; - - pcie-controller { - status = "okay"; - - pcie@1,0 { - status = "okay"; - }; - }; }; gpio_keys { |