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| author | Linus Walleij <linus.walleij@linaro.org> | 2021-07-16 01:58:54 +0200 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2021-08-09 01:55:10 +0200 |
| commit | f2791ed73193f0f0a5b5fa41da1ee4dfefa64a68 (patch) | |
| tree | dfc30ea167d7db9516b1192a5ac884d4467690e4 /arch/arm/boot/dts/intel-ixp45x-ixp46x.dtsi | |
| parent | e647167967f84b95f64c9ff14dc161fbd645e5cc (diff) | |
| download | lwn-f2791ed73193f0f0a5b5fa41da1ee4dfefa64a68.tar.gz lwn-f2791ed73193f0f0a5b5fa41da1ee4dfefa64a68.zip | |
ARM: dts: ixp4xx: Use the expansion bus
Replace the "simple-bus" simplification by the proper bus for
IXP4xx memory or device expansion.
Use chip-select addressing with two address cells on all the
flashes mounted on the IXP4xx devices. This includes all flash
chips.
Change the unit-name from @50000000 to @c4000000 as the DTS
validation screams. The registers for controlling the bus are
at c4000000 but the actual memory windows and ranges are at
50000000. Well it is just syntax, we can live with it.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/intel-ixp45x-ixp46x.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/intel-ixp45x-ixp46x.dtsi | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/intel-ixp45x-ixp46x.dtsi b/arch/arm/boot/dts/intel-ixp45x-ixp46x.dtsi index cce49e809043..b6ff614dadc6 100644 --- a/arch/arm/boot/dts/intel-ixp45x-ixp46x.dtsi +++ b/arch/arm/boot/dts/intel-ixp45x-ixp46x.dtsi @@ -9,6 +9,17 @@ / { soc { + bus@c4000000 { + compatible = "intel,ixp46x-expansion-bus-controller", "syscon"; + /* Uses at least up to 0x124 */ + reg = <0xc4000000 0x1000>; + }; + + rng@70002100 { + compatible = "intel,ixp46x-rng"; + reg = <0x70002100 4>; + }; + interrupt-controller@c8003000 { compatible = "intel,ixp43x-interrupt"; }; |