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authorTroy Kisky <troy.kisky@boundarydevices.com>2013-12-16 18:13:00 -0700
committerShawn Guo <shawn.guo@linaro.org>2014-02-09 21:29:29 +0800
commita48a1e527e0a0705f283860524ad4771727e8cc5 (patch)
treef680e3860a12ebe2f6d1e9e230f9b9f374cd2f23 /arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
parentf5ecc32ffd07e87e79f2fb2d57cec641ca1121d2 (diff)
downloadlwn-a48a1e527e0a0705f283860524ad4771727e8cc5.tar.gz
lwn-a48a1e527e0a0705f283860524ad4771727e8cc5.zip
ARM: dts: imx6qdl-sabrelite: add skews for Micrel phy
Set the data delays to min, and clock delays to max because the traces are equal length on pcb. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/imx6qdl-sabrelite.dtsi')
-rw-r--r--arch/arm/boot/dts/imx6qdl-sabrelite.dtsi12
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
index a1e9ed765ac7..d443eb77eae0 100644
--- a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
@@ -107,6 +107,18 @@
pinctrl-0 = <&pinctrl_enet>;
phy-mode = "rgmii";
phy-reset-gpios = <&gpio3 23 0>;
+ txen-skew-ps = <0>;
+ txc-skew-ps = <3000>;
+ rxdv-skew-ps = <0>;
+ rxc-skew-ps = <3000>;
+ rxd0-skew-ps = <0>;
+ rxd1-skew-ps = <0>;
+ rxd2-skew-ps = <0>;
+ rxd3-skew-ps = <0>;
+ txd0-skew-ps = <0>;
+ txd1-skew-ps = <0>;
+ txd2-skew-ps = <0>;
+ txd3-skew-ps = <0>;
status = "okay";
};