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author | Philipp Zabel <p.zabel@pengutronix.de> | 2014-04-14 17:37:26 +0200 |
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committer | Shawn Guo <shawn.guo@freescale.com> | 2014-05-16 23:01:54 +0800 |
commit | 26888190cb0f62ca29f1ebf1d67dad4fe51891ec (patch) | |
tree | 5e5e08a3699c5bc98853eb4851610086a54f9175 /arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi | |
parent | 94a1bbf85ac6d49d1e1452c8f8fe4db20e48d139 (diff) | |
download | lwn-26888190cb0f62ca29f1ebf1d67dad4fe51891ec.tar.gz lwn-26888190cb0f62ca29f1ebf1d67dad4fe51891ec.zip |
ARM: dts: pfla02: PHY reset is active-low
Note that the fec driver code currently hard-codes an active-low
reset, regardless of the flags in the device tree.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Diffstat (limited to 'arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi')
-rw-r--r-- | arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi index 713893702122..69361771274c 100644 --- a/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi +++ b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi @@ -9,6 +9,8 @@ * http://www.gnu.org/copyleft/gpl.html */ +#include <dt-bindings/gpio/gpio.h> + / { model = "Phytec phyFLEX-i.MX6 Ouad"; compatible = "phytec,imx6q-pfla02", "fsl,imx6q"; @@ -289,7 +291,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii"; - phy-reset-gpios = <&gpio3 23 0>; + phy-reset-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>; status = "disabled"; }; |