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| author | Marek Szyprowski <m.szyprowski@samsung.com> | 2019-12-11 15:51:55 +0100 |
|---|---|---|
| committer | Krzysztof Kozlowski <krzk@kernel.org> | 2019-12-12 21:18:36 +0100 |
| commit | 5206265f78e4e313bc982e289248a239cb3409e2 (patch) | |
| tree | 59a02416547a7ee5c138338623d2dfd103e807fc /arch/arm/boot/dts/exynos5410-odroidxu.dts | |
| parent | eaffc4de16c66c04ce340174280221960be18ed3 (diff) | |
| download | lwn-5206265f78e4e313bc982e289248a239cb3409e2.tar.gz lwn-5206265f78e4e313bc982e289248a239cb3409e2.zip | |
ARM: dts: exynos: Correct USB3503 GPIOs polarity
Current USB3503 driver ignores GPIO polarity and always operates as if the
GPIO lines were flagged as ACTIVE_HIGH. Fix the polarity for the existing
USB3503 chip applications to match the chip specification and common
convention for naming the pins. The only pin, which has to be ACTIVE_LOW
is the reset pin. The remaining are ACTIVE_HIGH. This change allows later
to fix the USB3503 driver to properly use generic GPIO bindings and read
polarity from DT.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/exynos5410-odroidxu.dts')
| -rw-r--r-- | arch/arm/boot/dts/exynos5410-odroidxu.dts | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/exynos5410-odroidxu.dts b/arch/arm/boot/dts/exynos5410-odroidxu.dts index e0db251e253f..4f9297ae0763 100644 --- a/arch/arm/boot/dts/exynos5410-odroidxu.dts +++ b/arch/arm/boot/dts/exynos5410-odroidxu.dts @@ -170,7 +170,7 @@ intn-gpios = <&gpx0 7 GPIO_ACTIVE_HIGH>; connect-gpios = <&gpx0 6 GPIO_ACTIVE_HIGH>; - reset-gpios = <&gpx1 4 GPIO_ACTIVE_HIGH>; + reset-gpios = <&gpx1 4 GPIO_ACTIVE_LOW>; initial-mode = <1>; clock-names = "refclk"; |