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authorSachin Kamat <sachin.kamat@linaro.org>2014-05-13 07:13:44 +0900
committerKukjin Kim <kgene.kim@samsung.com>2014-05-15 03:30:05 +0900
commitb3205dea8fbf6db9b1e46a0dad19a0712fdff44f (patch)
tree440450833abe1f4f5d6654f9f1c9e70f5c0fc4bb /arch/arm/boot/dts/exynos4x12.dtsi
parent3528dd34b2d3dc642669fd12399e18a16e3aacc8 (diff)
downloadlwn-b3205dea8fbf6db9b1e46a0dad19a0712fdff44f.tar.gz
lwn-b3205dea8fbf6db9b1e46a0dad19a0712fdff44f.zip
ARM: EXYNOS: Map SYSRAM through generic DT bindings
Instead of hardcoding the SYSRAM details for each SoC, pass this information through device tree (DT) and make the code SoC agnostic. Generic DT SRAM bindings are used for achieving this. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/boot/dts/exynos4x12.dtsi')
-rw-r--r--arch/arm/boot/dts/exynos4x12.dtsi18
1 files changed, 18 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi
index c4a9306f8529..70e3765b51ee 100644
--- a/arch/arm/boot/dts/exynos4x12.dtsi
+++ b/arch/arm/boot/dts/exynos4x12.dtsi
@@ -37,6 +37,24 @@
interrupts = <2 2>, <3 2>, <18 2>, <19 2>;
};
+ sysram@02020000 {
+ compatible = "mmio-sram";
+ reg = <0x02020000 0x40000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x02020000 0x40000>;
+
+ smp-sysram@0 {
+ compatible = "samsung,exynos4210-sysram";
+ reg = <0x0 0x1000>;
+ };
+
+ smp-sysram@2f000 {
+ compatible = "samsung,exynos4210-sysram-ns";
+ reg = <0x2f000 0x1000>;
+ };
+ };
+
pd_isp: isp-power-domain@10023CA0 {
compatible = "samsung,exynos4210-pd";
reg = <0x10023CA0 0x20>;