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authorTomasz Figa <t.figa@samsung.com>2012-10-11 10:11:18 +0200
committerLinus Walleij <linus.walleij@linaro.org>2012-10-15 09:10:12 +0200
commita04b07c0fc4d63e3fb9fea84d48a177ac5bd9164 (patch)
tree38504cfbceac9b3ed6359caded76a626b633fa12 /arch/arm/boot/dts/exynos4210.dtsi
parentd3a7b9e3a168df881a0ae3bd0d582f44a5d5aca3 (diff)
downloadlwn-a04b07c0fc4d63e3fb9fea84d48a177ac5bd9164.tar.gz
lwn-a04b07c0fc4d63e3fb9fea84d48a177ac5bd9164.zip
pinctrl: samsung: Use per-bank IRQ domain for wake-up interrupts
This patch reworks wake-up interrupt handling in pinctrl-exynos driver, so each pin bank, which provides wake-up interrupts, has its own IRQ domain. Information about whether given pin bank provides wake-up interrupts, how many and whether they are separate or muxed are parsed from device tree. It gives following advantages: - interrupts can be specified in device tree in a more readable way, e.g. : device { /* ... */ interrupt-parent = <&gpx2>; interrupts = <4 0>; /* ... */ }; - the amount and layout of interrupts is not hardcoded in the code anymore, but defined in SoC-specific structure - bank and pin of each wake-up interrupt can be easily identified, to allow operations, such as setting the pin to EINT function, from irq_set_type() callback Signed-off-by: Tomasz Figa <t.figa@samsung.com> Reviewed-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Thomas Abraham <thomas.abraham@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/exynos4210.dtsi')
-rw-r--r--arch/arm/boot/dts/exynos4210.dtsi8
1 files changed, 1 insertions, 7 deletions
diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi
index c27aea73abf7..d877dbe7ac0e 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -56,13 +56,7 @@
wakup_eint: wakeup-interrupt-controller {
compatible = "samsung,exynos4210-wakeup-eint";
interrupt-parent = <&gic>;
- interrupt-controller;
- #interrupt-cells = <2>;
- interrupts = <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>,
- <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>,
- <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>,
- <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>,
- <0 32 0>;
+ interrupts = <0 32 0>;
};
};