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| author | Lokesh Vutla <lokeshvutla@ti.com> | 2016-02-24 15:41:04 +0530 |
|---|---|---|
| committer | Tony Lindgren <tony@atomide.com> | 2016-02-29 15:02:15 -0800 |
| commit | dae320ec31736865d22bfac78717726b6545ff41 (patch) | |
| tree | 727c00770423f7513af069014f376aa65eb89c0a /arch/arm/boot/dts/dra7-evm.dts | |
| parent | 4d91e285483bf6a93d84a483ec0921b86bbc3d24 (diff) | |
| download | lwn-dae320ec31736865d22bfac78717726b6545ff41.tar.gz lwn-dae320ec31736865d22bfac78717726b6545ff41.zip | |
ARM: dts: DRA7: change address-cells and size-cells
DRA7 SoC has the capability to support DDR memory upto 4GB. In order to
represent this in memory dt node, the address-cells and size cells
should be 2. So, changing the address-cells and size-cells to 2 and
updating the memory nodes accordingly.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/boot/dts/dra7-evm.dts')
| -rw-r--r-- | arch/arm/boot/dts/dra7-evm.dts | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts index 803ab0e03657..d9b87236019d 100644 --- a/arch/arm/boot/dts/dra7-evm.dts +++ b/arch/arm/boot/dts/dra7-evm.dts @@ -18,7 +18,7 @@ memory { device_type = "memory"; - reg = <0x80000000 0x60000000>; /* 1536 MB */ + reg = <0x0 0x80000000 0x0 0x60000000>; /* 1536 MB */ }; evm_3v3_sd: fixedregulator-sd { |