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| author | Florian Fainelli <f.fainelli@gmail.com> | 2015-03-20 16:30:21 -0700 |
|---|---|---|
| committer | Florian Fainelli <f.fainelli@gmail.com> | 2018-11-05 10:41:12 -0800 |
| commit | 2af764dfb5eec71c4d3df81498c171cea917ffe4 (patch) | |
| tree | 8acd3dbeb82eec4e879c0a62f20d5f70698f918e /arch/arm/boot/dts/bcm63138.dtsi | |
| parent | 1c9001b4f69a37820862286b3bbcdde152a52dcf (diff) | |
| download | lwn-2af764dfb5eec71c4d3df81498c171cea917ffe4.tar.gz lwn-2af764dfb5eec71c4d3df81498c171cea917ffe4.zip | |
ARM: dts: BCM63xx: enable SATA PHY and AHCI controller
Add Device Tree entries for the Broadcom AHCI and SATA PHY controller
found on BCM63138 SoCs
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Diffstat (limited to 'arch/arm/boot/dts/bcm63138.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/bcm63138.dtsi | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/bcm63138.dtsi b/arch/arm/boot/dts/bcm63138.dtsi index 6df61518776f..f59764008b9c 100644 --- a/arch/arm/boot/dts/bcm63138.dtsi +++ b/arch/arm/boot/dts/bcm63138.dtsi @@ -143,6 +143,37 @@ reg = <0x4800e0 0x10>; #reset-cells = <2>; }; + + ahci: sata@8000 { + compatible = "brcm,bcm63138-ahci", "brcm,sata3-ahci"; + reg-names = "ahci", "top-ctrl"; + reg = <0xa000 0x9ac>, <0x8040 0x24>; + interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + resets = <&pmb0 3 1>; + reset-names = "ahci"; + status = "disabled"; + + sata0: sata-port@0 { + reg = <0>; + phys = <&sata_phy0>; + }; + }; + + sata_phy: sata-phy@8100 { + compatible = "brcm,bcm63138-sata-phy", "brcm,phy-sata3"; + reg = <0x8100 0x1e00>; + reg-names = "phy"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + sata_phy0: sata-phy@0 { + reg = <0>; + #phy-cells = <0>; + }; + }; }; /* Legacy UBUS base */ |