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authorEric Anholt <eric@anholt.net>2015-12-15 15:35:59 -0800
committerArnd Bergmann <arnd@arndb.de>2015-12-31 17:17:01 +0100
commitddc5c39af4e25d4d4eca925b792b372eedb778d8 (patch)
tree8cdaa2de545d93793b9e55acc836fbc8cc5a458b /arch/arm/boot/dts/bcm283x.dtsi
parent80534f095f182d9067a9ea02073b37f771f77d40 (diff)
downloadlwn-ddc5c39af4e25d4d4eca925b792b372eedb778d8.tar.gz
lwn-ddc5c39af4e25d4d4eca925b792b372eedb778d8.zip
ARM: bcm2835: Add the auxiliary clocks to the device tree.
These will be used for enabling UART1, SPI1, and SPI2. Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/boot/dts/bcm283x.dtsi')
-rw-r--r--arch/arm/boot/dts/bcm283x.dtsi7
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi
index 8a7e72799a5c..971e741e5467 100644
--- a/arch/arm/boot/dts/bcm283x.dtsi
+++ b/arch/arm/boot/dts/bcm283x.dtsi
@@ -152,6 +152,13 @@
status = "disabled";
};
+ aux: aux@0x7e215000 {
+ compatible = "brcm,bcm2835-aux";
+ #clock-cells = <1>;
+ reg = <0x7e215000 0x8>;
+ clocks = <&clocks BCM2835_CLOCK_VPU>;
+ };
+
sdhci: sdhci@7e300000 {
compatible = "brcm,bcm2835-sdhci";
reg = <0x7e300000 0x100>;