summaryrefslogtreecommitdiff
path: root/arch/arm/boot/dts/bcm283x.dtsi
diff options
context:
space:
mode:
authorEric Anholt <eric@anholt.net>2016-12-13 15:15:10 -0800
committerEric Anholt <eric@anholt.net>2017-03-06 09:19:21 -0800
commit4aba4cf820545ca8ec23785c7bac40bba7e505c5 (patch)
tree9fe322e03961d09fe5d3ccfb5e2a498a1a8f38c3 /arch/arm/boot/dts/bcm283x.dtsi
parentc1ae3cfa0e89fa1a7ecc4c99031f5e9ae99d9201 (diff)
downloadlwn-4aba4cf820545ca8ec23785c7bac40bba7e505c5.tar.gz
lwn-4aba4cf820545ca8ec23785c7bac40bba7e505c5.zip
ARM: dts: bcm2835: Add the DSI module nodes and clocks.
The modules stay disabled by default, and if you want to enable DSI you'll need an overlay that connects a panel to it. Signed-off-by: Eric Anholt <eric@anholt.net>
Diffstat (limited to 'arch/arm/boot/dts/bcm283x.dtsi')
-rw-r--r--arch/arm/boot/dts/bcm283x.dtsi48
1 files changed, 45 insertions, 3 deletions
diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi
index a3106aa446c6..9798bc9293d8 100644
--- a/arch/arm/boot/dts/bcm283x.dtsi
+++ b/arch/arm/boot/dts/bcm283x.dtsi
@@ -93,10 +93,13 @@
#clock-cells = <1>;
reg = <0x7e101000 0x2000>;
- /* CPRMAN derives everything from the platform's
- * oscillator.
+ /* CPRMAN derives almost everything from the
+ * platform's oscillator. However, the DSI
+ * pixel clocks come from the DSI analog PHY.
*/
- clocks = <&clk_osc>;
+ clocks = <&clk_osc>,
+ <&dsi0 0>, <&dsi0 1>, <&dsi0 2>,
+ <&dsi1 0>, <&dsi1 1>, <&dsi1 2>;
};
rng@7e104000 {
@@ -390,6 +393,25 @@
interrupts = <2 14>; /* pwa1 */
};
+ dsi0: dsi@7e209000 {
+ compatible = "brcm,bcm2835-dsi0";
+ reg = <0x7e209000 0x78>;
+ interrupts = <2 4>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ #clock-cells = <1>;
+
+ clocks = <&clocks BCM2835_PLLA_DSI0>,
+ <&clocks BCM2835_CLOCK_DSI0E>,
+ <&clocks BCM2835_CLOCK_DSI0P>;
+ clock-names = "phy", "escape", "pixel";
+
+ clock-output-names = "dsi0_byte",
+ "dsi0_ddr2",
+ "dsi0_ddr";
+
+ };
+
thermal: thermal@7e212000 {
compatible = "brcm,bcm2835-thermal";
reg = <0x7e212000 0x8>;
@@ -456,6 +478,26 @@
interrupts = <2 1>;
};
+ dsi1: dsi@7e700000 {
+ compatible = "brcm,bcm2835-dsi1";
+ reg = <0x7e700000 0x8c>;
+ interrupts = <2 12>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ #clock-cells = <1>;
+
+ clocks = <&clocks BCM2835_PLLD_DSI1>,
+ <&clocks BCM2835_CLOCK_DSI1E>,
+ <&clocks BCM2835_CLOCK_DSI1P>;
+ clock-names = "phy", "escape", "pixel";
+
+ clock-output-names = "dsi1_byte",
+ "dsi1_ddr2",
+ "dsi1_ddr";
+
+ status = "disabled";
+ };
+
i2c1: i2c@7e804000 {
compatible = "brcm,bcm2835-i2c";
reg = <0x7e804000 0x1000>;