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| author | Stefan Wahren <stefan.wahren@i2se.com> | 2017-07-30 19:10:32 +0200 |
|---|---|---|
| committer | Eric Anholt <eric@anholt.net> | 2017-08-02 15:17:36 -0700 |
| commit | 4188ea2aeb6dd8f99ab77662f463e41bc464a704 (patch) | |
| tree | b51f0bd944e3665bcfe85398d119df8159895251 /arch/arm/boot/dts/bcm2835-rpi.dtsi | |
| parent | 3bfe25fa9f8a56c5c877c7fd854d89238787c6d8 (diff) | |
| download | lwn-4188ea2aeb6dd8f99ab77662f463e41bc464a704.tar.gz lwn-4188ea2aeb6dd8f99ab77662f463e41bc464a704.zip | |
ARM: bcm283x: Define UART pinmuxing on board level
Until RPI 3 and Zero W the pl011 (uart0) was always on pin 14/15. So in
order to take care of them and other boards in the future,
we need to define UART pinmuxing on board level.
This work based on Eric Anholt's patch "ARM: bcm2385: Don't force pl011
onto pins 14/15." and Fabian Vogt's patch "ARM64: dts: bcm2837: assign
uart0 to BT and uart1 to pin headers".
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Eric Anholt <eric@anholt.net>
Diffstat (limited to 'arch/arm/boot/dts/bcm2835-rpi.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/bcm2835-rpi.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi index e55b362b9d6e..e36c392a2b8f 100644 --- a/arch/arm/boot/dts/bcm2835-rpi.dtsi +++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi @@ -39,7 +39,7 @@ }; alt0: alt0 { - brcm,pins = <4 5 7 8 9 10 11 14 15>; + brcm,pins = <4 5 7 8 9 10 11>; brcm,function = <BCM2835_FSEL_ALT0>; }; }; |