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| author | Josh Wu <josh.wu@atmel.com> | 2015-06-16 18:08:34 +0800 |
|---|---|---|
| committer | Nicolas Ferre <nicolas.ferre@atmel.com> | 2015-07-30 14:09:21 +0200 |
| commit | 917cdc5f7305c753ed6e58d7e87d25ba023f18b4 (patch) | |
| tree | 3bf12d66acc33ff2fef7f1016d3f88163e439390 /arch/arm/boot/dts/at91sam9g45.dtsi | |
| parent | 0f17c97e3eceb255b1078a1e3a03d2bb00245d9b (diff) | |
| download | lwn-917cdc5f7305c753ed6e58d7e87d25ba023f18b4.tar.gz lwn-917cdc5f7305c753ed6e58d7e87d25ba023f18b4.zip | |
ARM: at91/dt: add isi & ov2640 dt nodes for at91sam9m10g45ek board
First we group the isi data pins, and for now we only use 0~7 data pins
with HSYNC and VSYNC.
Also add the link for atmel-isi and ov2640 sensor node.
Signed-off-by: Josh Wu <josh.wu@atmel.com>
[nicolas.ferre@atmel.com: move the pinctrl properties in board .dts file]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Diffstat (limited to 'arch/arm/boot/dts/at91sam9g45.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/at91sam9g45.dtsi | 48 |
1 files changed, 29 insertions, 19 deletions
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi index 18177f5a7464..4268341b0ebb 100644 --- a/arch/arm/boot/dts/at91sam9g45.dtsi +++ b/arch/arm/boot/dts/at91sam9g45.dtsi @@ -498,23 +498,31 @@ }; isi { - pinctrl_isi: isi-0 { - atmel,pins = <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE /* D8 */ - AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE /* D9 */ - AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* D10 */ - AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE /* D11 */ - AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* D0 */ - AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* D1 */ - AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* D2 */ - AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* D3 */ - AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* D4 */ - AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* D5 */ - AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* D6 */ - AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* D7 */ - AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PCK */ - AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* VSYNC */ - AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* HSYNC */ - AT91_PIOB 31 AT91_PERIPH_A AT91_PINCTRL_NONE /* MCK */>; + pinctrl_isi_data_0_7: isi-0-data-0-7 { + atmel,pins = + <AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* D0 */ + AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* D1 */ + AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* D2 */ + AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* D3 */ + AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* D4 */ + AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* D5 */ + AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* D6 */ + AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* D7 */ + AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PCK */ + AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* VSYNC */ + AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* HSYNC */ + }; + + pinctrl_isi_data_8_9: isi-0-data-8-9 { + atmel,pins = + <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE /* D8 */ + AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* D9 */ + }; + + pinctrl_isi_data_10_11: isi-0-data-10-11 { + atmel,pins = + <AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* D10 */ + AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* D11 */ }; }; @@ -1067,9 +1075,11 @@ interrupts = <26 IRQ_TYPE_LEVEL_HIGH 5>; clocks = <&isi_clk>; clock-names = "isi_clk"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_isi>; status = "disabled"; + port { + #address-cells = <1>; + #size-cells = <0>; + }; }; pwm0: pwm@fffb8000 { |