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| author | Andrew Jeffery <andrew@aj.id.au> | 2019-12-03 22:34:13 +1030 |
|---|---|---|
| committer | Joel Stanley <joel@jms.id.au> | 2019-12-17 13:38:22 +1100 |
| commit | cf4aae1a05a241f206555cf2ed2de91011f3034c (patch) | |
| tree | 637a5db05726001bb12198e3100ab46a78e79cee /arch/arm/boot/dts/aspeed-g5.dtsi | |
| parent | e3f0cf4fb827ddcd2fc8e8ab06c431aca553bbf3 (diff) | |
| download | lwn-cf4aae1a05a241f206555cf2ed2de91011f3034c.tar.gz lwn-cf4aae1a05a241f206555cf2ed2de91011f3034c.zip | |
ARM: dts: aspeed-g5: Sort LPC child nodes by unit address
Lets try to maintain some sort of sanity.
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Diffstat (limited to 'arch/arm/boot/dts/aspeed-g5.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/aspeed-g5.dtsi | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi index 65c005c54dad..ebec0fa8baa7 100644 --- a/arch/arm/boot/dts/aspeed-g5.dtsi +++ b/arch/arm/boot/dts/aspeed-g5.dtsi @@ -474,17 +474,18 @@ status = "disabled"; }; - lhc: lhc@20 { - compatible = "aspeed,ast2500-lhc"; - reg = <0x20 0x24 0x48 0x8>; - }; - lpc_reset: reset-controller@18 { compatible = "aspeed,ast2500-lpc-reset"; reg = <0x18 0x4>; #reset-cells = <1>; }; + lhc: lhc@20 { + compatible = "aspeed,ast2500-lhc"; + reg = <0x20 0x24 0x48 0x8>; + }; + + ibt: ibt@c0 { compatible = "aspeed,ast2500-ibt-bmc"; reg = <0xc0 0x18>; |