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| author | Andrew Jeffery <andrew@aj.id.au> | 2019-12-03 22:34:12 +1030 |
|---|---|---|
| committer | Joel Stanley <joel@jms.id.au> | 2019-12-17 13:38:20 +1100 |
| commit | e3f0cf4fb827ddcd2fc8e8ab06c431aca553bbf3 (patch) | |
| tree | 1ac81e688097c7605a5d1f5c7a6ba3f7a3baadfb /arch/arm/boot/dts/aspeed-g4.dtsi | |
| parent | 2de782b76938de16e2284bdee83b5acc3c5e3ed3 (diff) | |
| download | lwn-e3f0cf4fb827ddcd2fc8e8ab06c431aca553bbf3.tar.gz lwn-e3f0cf4fb827ddcd2fc8e8ab06c431aca553bbf3.zip | |
ARM: dts: aspeed: Add reg hints to syscon children
Fixes the following warnings:
arch/arm/boot/dts/aspeed-g5.dtsi:209.28-226.6: Warning (avoid_unnecessary_addr_size): /ahb/apb/syscon@1e6e2000: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
arch/arm/boot/dts/aspeed-g4.dtsi:156.28-172.6: Warning (avoid_unnecessary_addr_size): /ahb/apb/syscon@1e6e2000: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Diffstat (limited to 'arch/arm/boot/dts/aspeed-g4.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/aspeed-g4.dtsi | 15 |
1 files changed, 9 insertions, 6 deletions
diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi index e1d4af06c217..807a0fc20670 100644 --- a/arch/arm/boot/dts/aspeed-g4.dtsi +++ b/arch/arm/boot/dts/aspeed-g4.dtsi @@ -179,18 +179,21 @@ compatible = "aspeed,ast2400-scu", "syscon", "simple-mfd"; reg = <0x1e6e2000 0x1a8>; #address-cells = <1>; - #size-cells = <0>; + #size-cells = <1>; + ranges = <0 0x1e6e2000 0x1000>; #clock-cells = <1>; #reset-cells = <1>; - pinctrl: pinctrl { - compatible = "aspeed,ast2400-pinctrl"; - }; - - p2a: p2a-control { + p2a: p2a-control@2c { + reg = <0x2c 0x4>; compatible = "aspeed,ast2400-p2a-ctrl"; status = "disabled"; }; + + pinctrl: pinctrl@80 { + reg = <0x80 0x18>, <0xa0 0x10>; + compatible = "aspeed,ast2400-pinctrl"; + }; }; rng: hwrng@1e6e2078 { |