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author | Cédric Le Goater <clg@kaod.org> | 2018-06-22 09:09:36 +0200 |
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committer | Joel Stanley <joel@jms.id.au> | 2019-11-01 15:33:21 +1030 |
commit | 876c5d891c9d7442d2734871317bc6480cd9f80e (patch) | |
tree | a3740c859a3a4e04bae775ea92582e38d63f885f /arch/arm/boot/dts/aspeed-g4.dtsi | |
parent | b46aaf8a663da643109597ab073fd6076b4e6eaa (diff) | |
download | lwn-876c5d891c9d7442d2734871317bc6480cd9f80e.tar.gz lwn-876c5d891c9d7442d2734871317bc6480cd9f80e.zip |
ARM: dts: aspeed: Add "spi-max-frequency" property
Keep the FMC controller chips at a safe 50 MHz rate and use 100 MHz
for the PNOR on the machines using a AST2500 SoC.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Diffstat (limited to 'arch/arm/boot/dts/aspeed-g4.dtsi')
-rw-r--r-- | arch/arm/boot/dts/aspeed-g4.dtsi | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi index 36df031e82d6..46c0891aac5a 100644 --- a/arch/arm/boot/dts/aspeed-g4.dtsi +++ b/arch/arm/boot/dts/aspeed-g4.dtsi @@ -65,6 +65,7 @@ flash@0 { reg = < 0 >; compatible = "jedec,spi-nor"; + spi-max-frequency = <50000000>; status = "disabled"; }; flash@1 { @@ -100,6 +101,7 @@ flash@0 { reg = < 0 >; compatible = "jedec,spi-nor"; + spi-max-frequency = <50000000>; status = "disabled"; }; }; |