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authorMatt Spinler <spinler@us.ibm.com>2019-07-19 15:30:37 -0500
committerJoel Stanley <joel@jms.id.au>2019-07-31 12:28:34 +0930
commit51b0c5c24484f7263ee34d2b48396b39734d0a1c (patch)
tree88abadea77296a5e9ec375fe3deb07bc33c65d3c /arch/arm/boot/dts/aspeed-bmc-opp-swift.dts
parentbb1dba7be1ee721b83a9cca24fb6d83f762b147b (diff)
downloadlwn-51b0c5c24484f7263ee34d2b48396b39734d0a1c.tar.gz
lwn-51b0c5c24484f7263ee34d2b48396b39734d0a1c.zip
ARM: dts: aspeed: swift: Fix FSI GPIOs
Change the FSI clock and data GPIOs to match what the hardware turned out to use. Fixes: 8e8fd0cbd7c5 ("ARM: dts: aspeed: Add Swift BMC machine") Signed-off-by: Matt Spinler <spinler@us.ibm.com> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Reviewed-by: Adriana Kobylak <anoo@us.ibm.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
Diffstat (limited to 'arch/arm/boot/dts/aspeed-bmc-opp-swift.dts')
-rw-r--r--arch/arm/boot/dts/aspeed-bmc-opp-swift.dts4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-swift.dts b/arch/arm/boot/dts/aspeed-bmc-opp-swift.dts
index caac895c60b4..f14f745b34ca 100644
--- a/arch/arm/boot/dts/aspeed-bmc-opp-swift.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-opp-swift.dts
@@ -207,8 +207,8 @@
#size-cells = <0>;
no-gpio-delays;
- clock-gpios = <&gpio ASPEED_GPIO(AA, 0) GPIO_ACTIVE_HIGH>;
- data-gpios = <&gpio ASPEED_GPIO(E, 0) GPIO_ACTIVE_HIGH>;
+ clock-gpios = <&gpio ASPEED_GPIO(P, 1) GPIO_ACTIVE_HIGH>;
+ data-gpios = <&gpio ASPEED_GPIO(P, 2) GPIO_ACTIVE_HIGH>;
mux-gpios = <&gpio ASPEED_GPIO(P, 4) GPIO_ACTIVE_HIGH>;
enable-gpios = <&gpio ASPEED_GPIO(P, 0) GPIO_ACTIVE_HIGH>;
trans-gpios = <&gpio ASPEED_GPIO(P, 3) GPIO_ACTIVE_HIGH>;