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| author | Maxime Ripard <maxime.ripard@free-electrons.com> | 2015-03-03 11:16:45 +0100 |
|---|---|---|
| committer | Gregory CLEMENT <gregory.clement@free-electrons.com> | 2015-03-04 14:32:19 +0100 |
| commit | 2a2dbd8b411028151a8adb09db3395a95769b4bb (patch) | |
| tree | 01606fed17d2f9b79d720cddf48f201538236aa7 /arch/arm/boot/dts/armada-385-db-ap.dts | |
| parent | 924361249de339123e15d78c1d95dd450a6e3f03 (diff) | |
| download | lwn-2a2dbd8b411028151a8adb09db3395a95769b4bb.tar.gz lwn-2a2dbd8b411028151a8adb09db3395a95769b4bb.zip | |
ARM: mvebu: a385-db-ap: Enable the NAND
The Armada 385 Access Point Development Board has a 1GB NAND SLC chip from
Micron as its main storage. Enable it.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Diffstat (limited to 'arch/arm/boot/dts/armada-385-db-ap.dts')
| -rw-r--r-- | arch/arm/boot/dts/armada-385-db-ap.dts | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/armada-385-db-ap.dts b/arch/arm/boot/dts/armada-385-db-ap.dts index 57b9119fb3e0..9e33f7d7276b 100644 --- a/arch/arm/boot/dts/armada-385-db-ap.dts +++ b/arch/arm/boot/dts/armada-385-db-ap.dts @@ -150,6 +150,19 @@ phy = <&phy0>; phy-mode = "rgmii-id"; }; + + nfc: flash@d0000 { + status = "okay"; + #address-cells = <1>; + #size-cells = <1>; + + num-cs = <1>; + nand-ecc-strength = <4>; + nand-ecc-step-size = <512>; + marvell,nand-keep-config; + marvell,nand-enable-arbiter; + nand-on-flash-bbt; + }; }; pcie-controller { |