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authorZach Brown <zach.brown@oracle.com>2006-01-27 14:02:47 -0800
committerSam Ravnborg <sam@mars.ravnborg.org>2006-02-19 09:51:19 +0100
commit379b5441aeb895fe55b877a8a9c187e8728f774c (patch)
tree67916a0f7d8a9a7d1ce186c81ac4f4481e6cc23e /Makefile
parent8e70c45887a6bbe40393342ea5b426b0dd836dff (diff)
downloadlwn-379b5441aeb895fe55b877a8a9c187e8728f774c.tar.gz
lwn-379b5441aeb895fe55b877a8a9c187e8728f774c.zip
x86: align per-cpu section to configured cache bytes
This matches the fix for a bug seen on x86-64. Test booted on old hardware that had 32 byte cachelines to begin with. Signed-off-by: Zach Brown <zach.brown@oracle.com> Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
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