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| author | Anurag Kumar Vulisha <anurag.kumar.vulisha@xilinx.com> | 2020-06-29 15:00:53 +0300 |
|---|---|---|
| committer | Vinod Koul <vkoul@kernel.org> | 2020-06-29 18:48:00 +0530 |
| commit | 4a33bea003144e217d8a3ae666f171dfc2e97bd6 (patch) | |
| tree | 13089a517c27bdd3e448041fd6e463d45d0ba65d /MAINTAINERS | |
| parent | cea0f76a483d1270ac6f6513964e3e75193dda48 (diff) | |
| download | lwn-4a33bea003144e217d8a3ae666f171dfc2e97bd6.tar.gz lwn-4a33bea003144e217d8a3ae666f171dfc2e97bd6.zip | |
phy: zynqmp: Add PHY driver for the Xilinx ZynqMP Gigabit Transceiver
Xilinx ZynqMP SoCs have a Gigabit Transceiver with four lanes. All the
high speed peripherals such as USB, SATA, PCIE, Display Port and
Ethernet SGMII can rely on any of the four GT lanes for PHY layer. This
patch adds driver for that ZynqMP GT core.
Signed-off-by: Anurag Kumar Vulisha <anurag.kumar.vulisha@xilinx.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://lore.kernel.org/r/20200629120054.29338-3-laurent.pinchart@ideasonboard.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'MAINTAINERS')
| -rw-r--r-- | MAINTAINERS | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/MAINTAINERS b/MAINTAINERS index 68f21d46614c..82a12abe24c6 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -18852,6 +18852,15 @@ F: Documentation/devicetree/bindings/media/xilinx/ F: drivers/media/platform/xilinx/ F: include/uapi/linux/xilinx-v4l2-controls.h +XILINX ZYNQMP PSGTR PHY DRIVER +M: Anurag Kumar Vulisha <anurag.kumar.vulisha@xilinx.com> +M: Laurent Pinchart <laurent.pinchart@ideasonboard.com> +L: linux-kernel@vger.kernel.org +S: Supported +T: git https://github.com/Xilinx/linux-xlnx.git +F: Documentation/devicetree/bindings/phy/xlnx,zynqmp-psgtr.yaml +F: drivers/phy/xilinx/phy-zynqmp.c + XILLYBUS DRIVER M: Eli Billauer <eli.billauer@gmail.com> L: linux-kernel@vger.kernel.org |