summaryrefslogtreecommitdiff
path: root/Documentation
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2024-07-26 10:57:07 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2024-07-26 10:57:07 -0700
commit0ba9b1551185a8b42003b708b6a9c25a9808701e (patch)
treef4e23b05bfed571db2bdd037a48025a44629de41 /Documentation
parent65ad409e6388ea59d8ae73e99857c565da69612e (diff)
parentd4ef5d2b7ee0cbb5f2d864716140366a618400d6 (diff)
downloadlwn-0ba9b1551185a8b42003b708b6a9c25a9808701e.tar.gz
lwn-0ba9b1551185a8b42003b708b6a9c25a9808701e.zip
Merge tag 'drm-next-2024-07-26' of https://gitlab.freedesktop.org/drm/kernel
Pull drm fixes from Dave Airlie: "Fixes for rc1, mostly amdgpu, i915 and xe, with some other misc ones, doesn't seem to be anything too serious. amdgpu: - Bump driver version for GFX12 DCC - DC documention warning fixes - VCN unified queue power fix - SMU fix - RAS fix - Display corruption fix - SDMA 5.2 workaround - GFX12 fixes - Uninitialized variable fix - VCN/JPEG 4.0.3 fixes - Misc display fixes - RAS fixes - VCN4/5 harvest fix - GPU reset fix i915: - Reset intel_dp->link_trained before retraining the link - Don't switch the LTTPR mode on an active link - Do not consider preemption during execlists_dequeue for gen8 - Allow NULL memory region xe: - xe_exec ioctl minor fix on sync entry cleanup upon error - SRIOV: limit VF LMEM provisioning - Wedge mode fixes v3d: - fix indirect dispatch on newer v3d revs panel: - fix panel backlight bindings" * tag 'drm-next-2024-07-26' of https://gitlab.freedesktop.org/drm/kernel: (39 commits) drm/amdgpu: reset vm state machine after gpu reset(vram lost) drm/amdgpu: add missed harvest check for VCN IP v4/v5 drm/amdgpu: Fix eeprom max record count drm/amdgpu: fix ras UE error injection failure issue drm/amd/display: Remove ASSERT if significance is zero in math_ceil2 drm/amd/display: Check for NULL pointer drm/amdgpu/vcn: Use offsets local to VCN/JPEG in VF drm/amdgpu: Add empty HDP flush function to VCN v4.0.3 drm/amdgpu: Add empty HDP flush function to JPEG v4.0.3 drm/amd/amdgpu: Fix uninitialized variable warnings drm/amdgpu: Fix atomics on GFX12 drm/amdgpu/sdma5.2: Update wptr registers as well as doorbell drm/i915: Allow NULL memory region drm/i915/gt: Do not consider preemption during execlists_dequeue for gen8 dt-bindings: display: panel: samsung,atna33xc20: Document ATNA45AF01 drm/xe: Don't suspend device upon wedge drm/xe: Wedge the entire device drm/xe/pf: Limit fair VF LMEM provisioning drm/xe/exec: Fix minor bug related to xe_sync_entry_cleanup drm/amd/display: fix corruption with high refresh rates on DCN 3.0 ...
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/display/panel/samsung,atna33xc20.yaml8
-rw-r--r--Documentation/gpu/amdgpu/display/dcn-blocks.rst35
-rw-r--r--Documentation/gpu/amdgpu/display/display-manager.rst4
3 files changed, 15 insertions, 32 deletions
diff --git a/Documentation/devicetree/bindings/display/panel/samsung,atna33xc20.yaml b/Documentation/devicetree/bindings/display/panel/samsung,atna33xc20.yaml
index 765ca155c83a..5192c93fbd67 100644
--- a/Documentation/devicetree/bindings/display/panel/samsung,atna33xc20.yaml
+++ b/Documentation/devicetree/bindings/display/panel/samsung,atna33xc20.yaml
@@ -14,7 +14,13 @@ allOf:
properties:
compatible:
- const: samsung,atna33xc20
+ oneOf:
+ # Samsung 13.3" FHD (1920x1080 pixels) eDP AMOLED panel
+ - const: samsung,atna33xc20
+ # Samsung 14.5" WQXGA+ (2880x1800 pixels) eDP AMOLED panel
+ - items:
+ - const: samsung,atna45af01
+ - const: samsung,atna33xc20
enable-gpios: true
port: true
diff --git a/Documentation/gpu/amdgpu/display/dcn-blocks.rst b/Documentation/gpu/amdgpu/display/dcn-blocks.rst
index a3fbd3ea028b..5e34366f6dbe 100644
--- a/Documentation/gpu/amdgpu/display/dcn-blocks.rst
+++ b/Documentation/gpu/amdgpu/display/dcn-blocks.rst
@@ -8,37 +8,22 @@ and the code documentation when it is automatically generated.
DCHUBBUB
--------
-.. kernel-doc:: drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h
+.. kernel-doc:: drivers/gpu/drm/amd/display/dc/inc/hw/dchubbub.h
:doc: overview
-.. kernel-doc:: drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h
- :export:
-
-.. kernel-doc:: drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h
- :internal:
-
HUBP
----
.. kernel-doc:: drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h
:doc: overview
-.. kernel-doc:: drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h
- :export:
-
-.. kernel-doc:: drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h
- :internal:
-
DPP
---
-.. kernel-doc:: drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h
+.. kernel-doc:: drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h
:doc: overview
-.. kernel-doc:: drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h
- :export:
-
-.. kernel-doc:: drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h
+.. kernel-doc:: drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h
:internal:
MPC
@@ -48,10 +33,8 @@ MPC
:doc: overview
.. kernel-doc:: drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h
- :export:
-
-.. kernel-doc:: drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h
:internal:
+ :no-identifiers: mpcc_blnd_cfg mpcc_alpha_blend_mode
OPP
---
@@ -60,19 +43,13 @@ OPP
:doc: overview
.. kernel-doc:: drivers/gpu/drm/amd/display/dc/inc/hw/opp.h
- :export:
-
-.. kernel-doc:: drivers/gpu/drm/amd/display/dc/inc/hw/opp.h
:internal:
DIO
---
-.. kernel-doc:: drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio.h
+.. kernel-doc:: drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio.c
:doc: overview
-.. kernel-doc:: drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio.h
- :export:
-
-.. kernel-doc:: drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio.h
+.. kernel-doc:: drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio.c
:internal:
diff --git a/Documentation/gpu/amdgpu/display/display-manager.rst b/Documentation/gpu/amdgpu/display/display-manager.rst
index 67a811e6891f..b269ff3f7a54 100644
--- a/Documentation/gpu/amdgpu/display/display-manager.rst
+++ b/Documentation/gpu/amdgpu/display/display-manager.rst
@@ -132,7 +132,7 @@ The DRM blend mode and its elements are then mapped by AMDGPU display manager
(MPC), as follows:
.. kernel-doc:: drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h
- :functions: mpcc_blnd_cfg
+ :identifiers: mpcc_blnd_cfg
Therefore, the blending configuration for a single MPCC instance on the MPC
tree is defined by :c:type:`mpcc_blnd_cfg`, where
@@ -144,7 +144,7 @@ alpha and plane alpha values. It sets one of the three modes for
:c:type:`MPCC_ALPHA_BLND_MODE`, as described below.
.. kernel-doc:: drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h
- :functions: mpcc_alpha_blend_mode
+ :identifiers: mpcc_alpha_blend_mode
DM then maps the elements of `enum mpcc_alpha_blend_mode` to those in the DRM
blend formula, as follows: