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author | Arnd Bergmann <arnd@arndb.de> | 2015-01-24 13:09:54 +0900 |
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committer | Kukjin Kim <kgene@kernel.org> | 2015-01-24 13:09:54 +0900 |
commit | d50b9e2e788dce9b120b5ac1140f0cdd1bf905eb (patch) | |
tree | b34a10958fc998b0718f720289d3e40049584b58 /Documentation | |
parent | 32b0aa9aaeb4a493135ea6368a614aa89c3c5488 (diff) | |
download | lwn-d50b9e2e788dce9b120b5ac1140f0cdd1bf905eb.tar.gz lwn-d50b9e2e788dce9b120b5ac1140f0cdd1bf905eb.zip |
ARM: SAMSUNG: remove unused DMA infrastructure
Everything uses dmaengine now, so there is no reason to
keep this around any longer. Thanks to everyone who was involved
in moving the users over to use the dmaengine APIs.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
Diffstat (limited to 'Documentation')
-rw-r--r-- | Documentation/arm/Samsung-S3C24XX/DMA.txt | 46 |
1 files changed, 0 insertions, 46 deletions
diff --git a/Documentation/arm/Samsung-S3C24XX/DMA.txt b/Documentation/arm/Samsung-S3C24XX/DMA.txt deleted file mode 100644 index 3ed82383efea..000000000000 --- a/Documentation/arm/Samsung-S3C24XX/DMA.txt +++ /dev/null @@ -1,46 +0,0 @@ - S3C2410 DMA - =========== - -Introduction ------------- - - The kernel provides an interface to manage DMA transfers - using the DMA channels in the CPU, so that the central - duty of managing channel mappings, and programming the - channel generators is in one place. - - -DMA Channel Ordering --------------------- - - Many of the range do not have connections for the DMA - channels to all sources, which means that some devices - have a restricted number of channels that can be used. - - To allow flexibility for each CPU type and board, the - DMA code can be given a DMA ordering structure which - allows the order of channel search to be specified, as - well as allowing the prohibition of certain claims. - - struct s3c24xx_dma_order has a list of channels, and - each channel within has a slot for a list of DMA - channel numbers. The slots are searched in order for - the presence of a DMA channel number with DMA_CH_VALID - or-ed in. - - If the order has the flag DMA_CH_NEVER set, then after - checking the channel list, the system will return no - found channel, thus denying the request. - - A board support file can call s3c24xx_dma_order_set() - to register a complete ordering set. The routine will - copy the data, so the original can be discarded with - __initdata. - - -Authour -------- - -Ben Dooks, -Copyright (c) 2007 Ben Dooks, Simtec Electronics -Licensed under the GPL v2 |