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| author | Murali Karicheri <m-karicheri2@ti.com> | 2015-05-29 12:04:13 -0400 |
|---|---|---|
| committer | Olof Johansson <olof@lixom.net> | 2015-07-31 22:30:11 +0200 |
| commit | c1bfa985ded82cacdfc6403e78f329c44e35534a (patch) | |
| tree | 87012dc0f962eab0f2d9ec36d0c5592d68d849e4 /Documentation | |
| parent | a7dae1551b55eff5308e5aa0e0149e57533ecb50 (diff) | |
| download | lwn-c1bfa985ded82cacdfc6403e78f329c44e35534a.tar.gz lwn-c1bfa985ded82cacdfc6403e78f329c44e35534a.zip | |
ARM: dts: keystone: fix dt bindings to use post div register for mainpll
All of the keystone devices have a separate register to hold post
divider value for main pll clock. Currently the fixed-postdiv
value used for k2hk/l/e SoCs works by sheer luck as u-boot happens to
use a value of 2 for this. Now that we have fixed this in the pll
clock driver change the dt bindings for the same.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'Documentation')
0 files changed, 0 insertions, 0 deletions