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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2009-08-07 10:46:51 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2009-08-07 10:46:51 -0700 |
| commit | 36b8659f9316b24c514a7c8290596b2382b91dd2 (patch) | |
| tree | b5228d0ccbde9600df13873b97eaae1c621e25e3 /Documentation | |
| parent | cba8784ae0a9f7d0f1f87e0607e7ae66fc45666c (diff) | |
| parent | c0c60c4b9ab45bb02b20796401dd6a90770fd0ee (diff) | |
| download | lwn-36b8659f9316b24c514a7c8290596b2382b91dd2.tar.gz lwn-36b8659f9316b24c514a7c8290596b2382b91dd2.zip | |
Merge master.kernel.org:/home/rmk/linux-2.6-arm
* master.kernel.org:/home/rmk/linux-2.6-arm: (30 commits)
ARM: 5639/1: arm: clkdev.c should include <linux/clk.h>
ARM: 5638/1: arch/arm/kernel/signal.c: use correct address space for CRUNCH
ARM: 5637/1: [KS8695] Don't reference CLOCK_TICK_RATE in drivers
ARM: S3C64XX: serial: Fix section mismatch warning
ARM: S3C24XX: serial: Fix section mismatch warnings
ARM: S3C: PWM fix for low duty cycle
ARM: 5597/1: [PCI] reset all internal hardware prior PCI initialization
ARM: 5627/1: Fix restoring of lr at the end of mcount
ARM: 5624/1: Document cache aliasing region
S3C64XX: Fix ARMCLK configuration
S3C64XX: Fix get_rate() for ARMCLK
S3C24XX: GPIO: Fix pin range check in s3c_gpiolib_getchip
mx3 defconfig update
mx27 defconfig update
ARM: 5623/1: Treo680: ir shutdown typo fix
ARM: includecheck fix: plat-stmp3xxx/pinmux.c
ARM: includecheck fix: plat-s3c64xx/pm.c
ARM: includecheck fix: mach-omap2/mcbsp.c
ARM: includecheck fix: mach-omap1/mcbsp.c
ARM: includecheck fix: board-sffsdr.c
...
Diffstat (limited to 'Documentation')
| -rw-r--r-- | Documentation/arm/memory.txt | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/Documentation/arm/memory.txt b/Documentation/arm/memory.txt index 43cb1004d35f..9d58c7c5eddd 100644 --- a/Documentation/arm/memory.txt +++ b/Documentation/arm/memory.txt @@ -21,6 +21,8 @@ ffff8000 ffffffff copy_user_page / clear_user_page use. For SA11xx and Xscale, this is used to setup a minicache mapping. +ffff4000 ffffffff cache aliasing on ARMv6 and later CPUs. + ffff1000 ffff7fff Reserved. Platforms must not use this address range. |