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author | David Hildenbrand <dahi@linux.vnet.ibm.com> | 2016-06-21 14:19:51 +0200 |
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committer | Christian Borntraeger <borntraeger@de.ibm.com> | 2016-07-18 14:15:00 +0200 |
commit | 6502a34cfd6695929086187f63fe670cc3050e68 (patch) | |
tree | 774e386aac358c15baeeba02a38bb8b080e3887d /Documentation/virtual/kvm/api.txt | |
parent | af1bae5497b98cb99d6b0492e6981f060420a00c (diff) | |
download | lwn-6502a34cfd6695929086187f63fe670cc3050e68.tar.gz lwn-6502a34cfd6695929086187f63fe670cc3050e68.zip |
KVM: s390: allow user space to handle instr 0x0000
We will use illegal instruction 0x0000 for handling 2 byte sw breakpoints
from user space. As it can be enabled dynamically via a capability,
let's move setting of ICTL_OPEREXC to the post creation step, so we avoid
any races when enabling that capability just while adding new cpus.
Acked-by: Janosch Frank <frankja@linux.vnet.ibm.com>
Reviewed-by: Cornelia Huck <cornelia.huck@de.ibm.com>
Signed-off-by: David Hildenbrand <dahi@linux.vnet.ibm.com>
Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
Diffstat (limited to 'Documentation/virtual/kvm/api.txt')
-rw-r--r-- | Documentation/virtual/kvm/api.txt | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/Documentation/virtual/kvm/api.txt b/Documentation/virtual/kvm/api.txt index c4d2fb0e28de..299306db5d84 100644 --- a/Documentation/virtual/kvm/api.txt +++ b/Documentation/virtual/kvm/api.txt @@ -3857,6 +3857,19 @@ as a broadcast even in x2APIC mode in order to support physical x2APIC without interrupt remapping. This is undesirable in logical mode, where 0xff represents CPUs 0-7 in cluster 0. +7.8 KVM_CAP_S390_USER_INSTR0 + +Architectures: s390 +Parameters: none + +With this capability enabled, all illegal instructions 0x0000 (2 bytes) will +be intercepted and forwarded to user space. User space can use this +mechanism e.g. to realize 2-byte software breakpoints. The kernel will +not inject an operating exception for these instructions, user space has +to take care of that. + +This capability can be enabled dynamically even if VCPUs were already +created and are running. 8. Other capabilities. ---------------------- |