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author | Linus Torvalds <torvalds@linux-foundation.org> | 2023-02-25 11:14:08 -0800 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2023-02-25 11:14:08 -0800 |
commit | 01687e7c935ef70eca69ea2d468020bc93e898dc (patch) | |
tree | 2e615dec7e27f6cc9895b8efcb93646a990b709f /Documentation/translations | |
parent | d0a32f5520a33e7f2ace396db6913625e0d29544 (diff) | |
parent | eb9be8310c58c166f9fae3b71c0ad9d6741b4897 (diff) | |
download | lwn-01687e7c935ef70eca69ea2d468020bc93e898dc.tar.gz lwn-01687e7c935ef70eca69ea2d468020bc93e898dc.zip |
Merge tag 'riscv-for-linus-6.3-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux
Pull RISC-V updates from Palmer Dabbelt:
"There's a bunch of fixes/cleanups throughout the tree as usual, but we
also have a handful of new features:
- Various improvements to the extension detection and alternative
patching infrastructure
- Zbb-optimized string routines
- Support for cpu-capacity in the RISC-V DT bindings
- Zicbom no longer depends on toolchain support
- Some performance and code size improvements to ftrace
- Support for ARCH_WANT_LD_ORPHAN_WARN
- Oops now contain the faulting instruction"
* tag 'riscv-for-linus-6.3-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: (67 commits)
RISC-V: add a spin_shadow_stack declaration
riscv: mm: hugetlb: Enable ARCH_WANT_HUGETLB_PAGE_OPTIMIZE_VMEMMAP
riscv: Add header include guards to insn.h
riscv: alternative: proceed one more instruction for auipc/jalr pair
riscv: Avoid enabling interrupts in die()
riscv, mm: Perform BPF exhandler fixup on page fault
RISC-V: take text_mutex during alternative patching
riscv: hwcap: Don't alphabetize ISA extension IDs
RISC-V: fix ordering of Zbb extension
riscv: jump_label: Fixup unaligned arch_static_branch function
RISC-V: Only provide the single-letter extensions in HWCAP
riscv: mm: fix regression due to update_mmu_cache change
scripts/decodecode: Add support for RISC-V
riscv: Add instruction dump to RISC-V splats
riscv: select ARCH_WANT_LD_ORPHAN_WARN for !XIP_KERNEL
riscv: vmlinux.lds.S: explicitly catch .init.bss sections from EFI stub
riscv: vmlinux.lds.S: explicitly catch .riscv.attributes sections
riscv: vmlinux.lds.S: explicitly catch .rela.dyn symbols
riscv: lds: define RUNTIME_DISCARD_EXIT
RISC-V: move some stray __RISCV_INSN_FUNCS definitions from kprobes
...
Diffstat (limited to 'Documentation/translations')
-rw-r--r-- | Documentation/translations/zh_CN/scheduler/sched-capacity.rst | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/Documentation/translations/zh_CN/scheduler/sched-capacity.rst b/Documentation/translations/zh_CN/scheduler/sched-capacity.rst index 3a52053c29dc..e07ffdd391d3 100644 --- a/Documentation/translations/zh_CN/scheduler/sched-capacity.rst +++ b/Documentation/translations/zh_CN/scheduler/sched-capacity.rst @@ -233,7 +233,7 @@ CFS调度类基于实体负载跟踪机制(Per-Entity Load Tracking, PELT) arm和arm64架构直接把这个信息映射到arch_topology驱动的CPU scaling数据中(译注:参考 arch_topology.h的percpu变量cpu_scale),它是从capacity-dmips-mhz CPU binding中衍生计算 -出来的。参见Documentation/devicetree/bindings/arm/cpu-capacity.txt。 +出来的。参见Documentation/devicetree/bindings/cpu/cpu-capacity.txt。 3.2 频率不变性 -------------- |