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authorMatt LaPlante <kernel1@cyberdogtech.com>2006-10-03 22:45:33 +0200
committerAdrian Bunk <bunk@stusta.de>2006-10-03 22:45:33 +0200
commit3f6dee9b2a22cc66050682287a77d5fccadb9733 (patch)
tree2670d9a0e9f445cc60e52b85f33ebcfef101ec86 /Documentation/memory-barriers.txt
parentcab00891c5489cb6d0cde0a55d39bd5f2871fa70 (diff)
downloadlwn-3f6dee9b2a22cc66050682287a77d5fccadb9733.tar.gz
lwn-3f6dee9b2a22cc66050682287a77d5fccadb9733.zip
Fix some typos in Documentation/: 'A'
This patch fixes typos in various Documentation txts. This patch addresses some words starting with the letter 'A'. Signed-off-by: Matt LaPlante <kernel1@cyberdogtech.com> Acked-by: Randy Dunlap <rdunlap@xenotime.net> Acked-by: Alan Cox <alan@redhat.com> Signed-off-by: Adrian Bunk <bunk@stusta.de>
Diffstat (limited to 'Documentation/memory-barriers.txt')
-rw-r--r--Documentation/memory-barriers.txt2
1 files changed, 1 insertions, 1 deletions
diff --git a/Documentation/memory-barriers.txt b/Documentation/memory-barriers.txt
index 46b9b389df35..a60f3ce474e3 100644
--- a/Documentation/memory-barriers.txt
+++ b/Documentation/memory-barriers.txt
@@ -1915,7 +1915,7 @@ Whilst most CPUs do imply a data dependency barrier on the read when a memory
access depends on a read, not all do, so it may not be relied on.
Other CPUs may also have split caches, but must coordinate between the various
-cachelets for normal memory accesss. The semantics of the Alpha removes the
+cachelets for normal memory accesses. The semantics of the Alpha removes the
need for coordination in absence of memory barriers.