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authorIngo Molnar <mingo@elte.hu>2010-06-18 10:53:12 +0200
committerIngo Molnar <mingo@elte.hu>2010-06-18 10:53:19 +0200
commit646b1db4956ba8bf748b835b5eba211133d91c2e (patch)
tree061166d873d9da9cf83044a7593ad111787076c5 /Documentation/i2c/busses/i2c-ali1563
parent0f2c3de2ba110626515234d5d584fb1b0c0749a2 (diff)
parent7e27d6e778cd87b6f2415515d7127eba53fe5d02 (diff)
downloadlwn-646b1db4956ba8bf748b835b5eba211133d91c2e.tar.gz
lwn-646b1db4956ba8bf748b835b5eba211133d91c2e.zip
Merge commit 'v2.6.35-rc3' into perf/core
Merge reason: Go from -rc1 base to -rc3 base, merge in fixes.
Diffstat (limited to 'Documentation/i2c/busses/i2c-ali1563')
-rw-r--r--Documentation/i2c/busses/i2c-ali15632
1 files changed, 1 insertions, 1 deletions
diff --git a/Documentation/i2c/busses/i2c-ali1563 b/Documentation/i2c/busses/i2c-ali1563
index 99ad4b9bcc32..54691698d2dd 100644
--- a/Documentation/i2c/busses/i2c-ali1563
+++ b/Documentation/i2c/busses/i2c-ali1563
@@ -18,7 +18,7 @@ For an overview of these chips see http://www.acerlabs.com
The M1563 southbridge is deceptively similar to the M1533, with a few
notable exceptions. One of those happens to be the fact they upgraded the
i2c core to be SMBus 2.0 compliant, and happens to be almost identical to
-the i2c controller found in the Intel 801 south bridges.
+the i2c controller found in the Intel 801 south bridges.
Features
--------