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authorAlban Bedel <albeu@free.fr>2015-07-03 10:14:57 +0200
committerRob Herring <robh@kernel.org>2015-07-27 08:24:39 -0500
commit3b6e644e6540405fd3582e0a90412fccbddd0e45 (patch)
treede3f182101d2139cfc5d16035469344f6e2d51fb /Documentation/devicetree/bindings
parent35068ce8cbf1749ef1a4b9b1493af83b8488c37b (diff)
downloadlwn-3b6e644e6540405fd3582e0a90412fccbddd0e45.tar.gz
lwn-3b6e644e6540405fd3582e0a90412fccbddd0e45.zip
DEVICETREE: Misc fix for the AR7100 SPI controller binding
Fix the clocks property documentation and use lower case for hex values in the example. Signed-off-by: Alban Bedel <albeu@free.fr> Signed-off-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings')
-rw-r--r--Documentation/devicetree/bindings/spi/spi-ath79.txt6
1 files changed, 3 insertions, 3 deletions
diff --git a/Documentation/devicetree/bindings/spi/spi-ath79.txt b/Documentation/devicetree/bindings/spi/spi-ath79.txt
index f1ad9c367532..9c696fa66f81 100644
--- a/Documentation/devicetree/bindings/spi/spi-ath79.txt
+++ b/Documentation/devicetree/bindings/spi/spi-ath79.txt
@@ -3,7 +3,7 @@ Binding for Qualcomm Atheros AR7xxx/AR9xxx SPI controller
Required properties:
- compatible: has to be "qca,<soc-type>-spi", "qca,ar7100-spi" as fallback.
- reg: Base address and size of the controllers memory area
-- clocks: phandle to the AHB clock.
+- clocks: phandle of the AHB clock.
- clock-names: has to be "ahb".
- #address-cells: <1>, as required by generic SPI binding.
- #size-cells: <0>, also as required by generic SPI binding.
@@ -12,9 +12,9 @@ Child nodes as per the generic SPI binding.
Example:
- spi@1F000000 {
+ spi@1f000000 {
compatible = "qca,ar9132-spi", "qca,ar7100-spi";
- reg = <0x1F000000 0x10>;
+ reg = <0x1f000000 0x10>;
clocks = <&pll 2>;
clock-names = "ahb";