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authorLinus Torvalds <torvalds@linux-foundation.org>2015-06-29 09:44:45 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2015-06-29 09:44:45 -0700
commit1bc5e157ed2b4f5b206155fc772d860158acd201 (patch)
tree0edf76217120a05502437e775bf99cf66ae0d13f /Documentation/devicetree/bindings
parentf199b663fc5a276af10a49c24a83d8de27a41b53 (diff)
parent657d61275dad112ff36e70ee63c71d64821db36c (diff)
downloadlwn-1bc5e157ed2b4f5b206155fc772d860158acd201.tar.gz
lwn-1bc5e157ed2b4f5b206155fc772d860158acd201.zip
Merge tag 'dmaengine-4.2-rc1' of git://git.infradead.org/users/vkoul/slave-dma
Pull dmaengine updates from Vinod Koul: "This time we have support for few new devices, few new features and odd fixes spread thru the subsystem. New devices added: - support for CSRatlas7 dma controller - Allwinner H3(sun8i) controller - TI DMA crossbar driver on DRA7x - new pxa driver New features added: - memset support is bought back now that we have a user in xdmac controller - interleaved transfers support different source and destination strides - supporting DMA routers and configuration thru DT - support for reusing descriptors - xdmac memset and interleaved transfer support - hdmac support for interleaved transfers - omap-dma support for memcpy Others: - Constify platform_device_id - mv_xor fixes and improvements" * tag 'dmaengine-4.2-rc1' of git://git.infradead.org/users/vkoul/slave-dma: (46 commits) dmaengine: xgene: fix file permission dmaengine: fsl-edma: clear pending interrupts on initialization dmaengine: xdmac: Add memset support Documentation: dmaengine: document DMA_CTRL_ACK dmaengine: virt-dma: don't always free descriptor upon completion dmaengine: Revert "drivers/dma: remove unused support for MEMSET operations" dmaengine: hdmac: Implement interleaved transfers dmaengine: Move icg helpers to global header dmaengine: mv_xor: improve descriptors list handling and reduce locking dmaengine: mv_xor: Enlarge descriptor pool size dmaengine: mv_xor: add support for a38x command in descriptor mode dmaengine: mv_xor: Rename function for consistent naming dmaengine: mv_xor: bug fix for racing condition in descriptors cleanup dmaengine: pl330: fix wording in mcbufsz message dmaengine: sirf: add CSRatlas7 SoC support dmaengine: xgene-dma: Fix "incorrect type in assignement" warnings dmaengine: fix kernel-doc documentation dmaengine: pxa_dma: add support for legacy transition dmaengine: pxa_dma: add debug information dmaengine: pxa: add pxa dmaengine driver ...
Diffstat (limited to 'Documentation/devicetree/bindings')
-rw-r--r--Documentation/devicetree/bindings/dma/dma.txt28
-rw-r--r--Documentation/devicetree/bindings/dma/mv-xor.txt2
-rw-r--r--Documentation/devicetree/bindings/dma/sirfsoc-dma.txt3
-rw-r--r--Documentation/devicetree/bindings/dma/sun6i-dma.txt5
-rw-r--r--Documentation/devicetree/bindings/dma/ti-dma-crossbar.txt52
5 files changed, 87 insertions, 3 deletions
diff --git a/Documentation/devicetree/bindings/dma/dma.txt b/Documentation/devicetree/bindings/dma/dma.txt
index 82104271e754..6312fb00ce8d 100644
--- a/Documentation/devicetree/bindings/dma/dma.txt
+++ b/Documentation/devicetree/bindings/dma/dma.txt
@@ -31,6 +31,34 @@ Example:
dma-requests = <127>;
};
+* DMA router
+
+DMA routers are transparent IP blocks used to route DMA request lines from
+devices to the DMA controller. Some SoCs (like TI DRA7x) have more peripherals
+integrated with DMA requests than what the DMA controller can handle directly.
+
+Required property:
+- dma-masters: phandle of the DMA controller or list of phandles for
+ the DMA controllers the router can direct the signal to.
+- #dma-cells: Must be at least 1. Used to provide DMA router specific
+ information. See DMA client binding below for more
+ details.
+
+Optional properties:
+- dma-requests: Number of incoming request lines the router can handle.
+- In the node pointed by the dma-masters:
+ - dma-requests: The router driver might need to look for this in order
+ to configure the routing.
+
+Example:
+ sdma_xbar: dma-router@4a002b78 {
+ compatible = "ti,dra7-dma-crossbar";
+ reg = <0x4a002b78 0xfc>;
+ #dma-cells = <1>;
+ dma-requests = <205>;
+ ti,dma-safe-map = <0>;
+ dma-masters = <&sdma>;
+ };
* DMA client
diff --git a/Documentation/devicetree/bindings/dma/mv-xor.txt b/Documentation/devicetree/bindings/dma/mv-xor.txt
index 7c6cb7fcecd2..cc29c35266e2 100644
--- a/Documentation/devicetree/bindings/dma/mv-xor.txt
+++ b/Documentation/devicetree/bindings/dma/mv-xor.txt
@@ -1,7 +1,7 @@
* Marvell XOR engines
Required properties:
-- compatible: Should be "marvell,orion-xor"
+- compatible: Should be "marvell,orion-xor" or "marvell,armada-380-xor"
- reg: Should contain registers location and length (two sets)
the first set is the low registers, the second set the high
registers for the XOR engine.
diff --git a/Documentation/devicetree/bindings/dma/sirfsoc-dma.txt b/Documentation/devicetree/bindings/dma/sirfsoc-dma.txt
index ecbc96ad36f8..ccd52d6a231a 100644
--- a/Documentation/devicetree/bindings/dma/sirfsoc-dma.txt
+++ b/Documentation/devicetree/bindings/dma/sirfsoc-dma.txt
@@ -3,7 +3,8 @@
See dma.txt first
Required properties:
-- compatible: Should be "sirf,prima2-dmac" or "sirf,marco-dmac"
+- compatible: Should be "sirf,prima2-dmac", "sirf,atlas7-dmac" or
+ "sirf,atlas7-dmac-v2"
- reg: Should contain DMA registers location and length.
- interrupts: Should contain one interrupt shared by all channel
- #dma-cells: must be <1>. used to represent the number of integer
diff --git a/Documentation/devicetree/bindings/dma/sun6i-dma.txt b/Documentation/devicetree/bindings/dma/sun6i-dma.txt
index 9cdcba24d7c3..d13c136cef8c 100644
--- a/Documentation/devicetree/bindings/dma/sun6i-dma.txt
+++ b/Documentation/devicetree/bindings/dma/sun6i-dma.txt
@@ -4,7 +4,10 @@ This driver follows the generic DMA bindings defined in dma.txt.
Required properties:
-- compatible: Must be "allwinner,sun6i-a31-dma" or "allwinner,sun8i-a23-dma"
+- compatible: Must be one of
+ "allwinner,sun6i-a31-dma"
+ "allwinner,sun8i-a23-dma"
+ "allwinner,sun8i-h3-dma"
- reg: Should contain the registers base address and length
- interrupts: Should contain a reference to the interrupt used by this device
- clocks: Should contain a reference to the parent AHB clock
diff --git a/Documentation/devicetree/bindings/dma/ti-dma-crossbar.txt b/Documentation/devicetree/bindings/dma/ti-dma-crossbar.txt
new file mode 100644
index 000000000000..63a48928f3a8
--- /dev/null
+++ b/Documentation/devicetree/bindings/dma/ti-dma-crossbar.txt
@@ -0,0 +1,52 @@
+Texas Instruments DMA Crossbar (DMA request router)
+
+Required properties:
+- compatible: "ti,dra7-dma-crossbar" for DRA7xx DMA crossbar
+- reg: Memory map for accessing module
+- #dma-cells: Should be set to <1>.
+ Clients should use the crossbar request number (input)
+- dma-requests: Number of DMA requests the crossbar can receive
+- dma-masters: phandle pointing to the DMA controller
+
+The DMA controller node need to have the following poroperties:
+- dma-requests: Number of DMA requests the controller can handle
+
+Optional properties:
+- ti,dma-safe-map: Safe routing value for unused request lines
+
+Example:
+
+/* DMA controller */
+sdma: dma-controller@4a056000 {
+ compatible = "ti,omap4430-sdma";
+ reg = <0x4a056000 0x1000>;
+ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+ #dma-cells = <1>;
+ dma-channels = <32>;
+ dma-requests = <127>;
+};
+
+/* DMA crossbar */
+sdma_xbar: dma-router@4a002b78 {
+ compatible = "ti,dra7-dma-crossbar";
+ reg = <0x4a002b78 0xfc>;
+ #dma-cells = <1>;
+ dma-requests = <205>;
+ ti,dma-safe-map = <0>;
+ dma-masters = <&sdma>;
+};
+
+/* DMA client */
+uart1: serial@4806a000 {
+ compatible = "ti,omap4-uart";
+ reg = <0x4806a000 0x100>;
+ interrupts-extended = <&gic GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
+ ti,hwmods = "uart1";
+ clock-frequency = <48000000>;
+ status = "disabled";
+ dmas = <&sdma_xbar 49>, <&sdma_xbar 50>;
+ dma-names = "tx", "rx";
+};