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| author | Andrew Jones <ajones@ventanamicro.com> | 2023-02-24 17:26:25 +0100 |
|---|---|---|
| committer | Palmer Dabbelt <palmer@rivosinc.com> | 2023-03-14 21:26:02 -0700 |
| commit | 8b05e7d0408ac99e2f05f3673f2f249e9a9e10ec (patch) | |
| tree | 9db03941c383a98c14002f90a4602cb8e1dece88 /Documentation/devicetree/bindings/riscv/cpus.yaml | |
| parent | 0b2f658f5370d9818244682c76fd8f6a91b2b1af (diff) | |
| download | lwn-8b05e7d0408ac99e2f05f3673f2f249e9a9e10ec.tar.gz lwn-8b05e7d0408ac99e2f05f3673f2f249e9a9e10ec.zip | |
RISC-V: Factor out body of riscv_init_cbom_blocksize loop
Refactor riscv_init_cbom_blocksize() to prepare for it to be used
for both cbom block size and cboz block size.
Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20230224162631.405473-3-ajones@ventanamicro.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'Documentation/devicetree/bindings/riscv/cpus.yaml')
0 files changed, 0 insertions, 0 deletions