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authorJerome Brunet <jbrunet@baylibre.com>2018-07-20 17:26:32 +0200
committerPhilipp Zabel <p.zabel@pengutronix.de>2018-07-20 17:50:24 +0200
commit5338073561bea23363e5552b647dad75bc7d0f11 (patch)
tree82128beefe0db586f44d713fd440d949200e76bc /Documentation/devicetree/bindings/reset/amlogic,meson-axg-audio-arb.txt
parent6b39fd590aebca1a6a4c827f29f14d2b6df3939d (diff)
downloadlwn-5338073561bea23363e5552b647dad75bc7d0f11.tar.gz
lwn-5338073561bea23363e5552b647dad75bc7d0f11.zip
reset: meson: add dt-bindings for meson-axg audio arb
Add dt-bindings for the audio memory arbiter found on Amlogic's A113 based SoCs Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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+* Amlogic audio memory arbiter controller
+
+The Amlogic Audio ARB is a simple device which enables or
+disables the access of Audio FIFOs to DDR on AXG based SoC.
+
+Required properties:
+- compatible: 'amlogic,meson-axg-audio-arb'
+- reg: physical base address of the controller and length of memory
+ mapped region.
+- clocks: phandle to the fifo peripheral clock provided by the audio
+ clock controller.
+- #reset-cells: must be 1.
+
+Example on the A113 SoC:
+
+arb: reset-controller@280 {
+ compatible = "amlogic,meson-axg-audio-arb";
+ reg = <0x0 0x280 0x0 0x4>;
+ #reset-cells = <1>;
+ clocks = <&clkc_audio AUD_CLKID_DDR_ARB>;
+};