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author | John Crispin <john@phrozen.org> | 2018-07-25 11:52:08 +0200 |
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committer | Thierry Reding <thierry.reding@gmail.com> | 2018-08-20 11:35:44 +0200 |
commit | 935be8e08a73e090ee8a9e252242c089f81a4ce4 (patch) | |
tree | 0a7dca615a469c004eee0775c9cb83d3d4452117 /Documentation/devicetree/bindings/pwm | |
parent | 5cd96041d027d958fe6b24e193488a468af0762e (diff) | |
download | lwn-935be8e08a73e090ee8a9e252242c089f81a4ce4.tar.gz lwn-935be8e08a73e090ee8a9e252242c089f81a4ce4.zip |
dt-bindings: pwm: Add MT7628 information
Enhance the MediaTek PWM binding with details about the IP found in the
MT7628 SoC.
Signed-off-by: John Crispin <john@phrozen.org>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Diffstat (limited to 'Documentation/devicetree/bindings/pwm')
-rw-r--r-- | Documentation/devicetree/bindings/pwm/pwm-mediatek.txt | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/pwm/pwm-mediatek.txt b/Documentation/devicetree/bindings/pwm/pwm-mediatek.txt index ef8bd3cb67ab..991728cb46cb 100644 --- a/Documentation/devicetree/bindings/pwm/pwm-mediatek.txt +++ b/Documentation/devicetree/bindings/pwm/pwm-mediatek.txt @@ -5,11 +5,13 @@ Required properties: - "mediatek,mt2712-pwm": found on mt2712 SoC. - "mediatek,mt7622-pwm": found on mt7622 SoC. - "mediatek,mt7623-pwm": found on mt7623 SoC. + - "mediatek,mt7628-pwm": found on mt7628 SoC. - reg: physical base address and length of the controller's registers. - #pwm-cells: must be 2. See pwm.txt in this directory for a description of the cell format. - clocks: phandle and clock specifier of the PWM reference clock. - - clock-names: must contain the following: + - clock-names: must contain the following, except for MT7628 which + has no clocks - "top": the top clock generator - "main": clock used by the PWM core - "pwm1-8": the eight per PWM clocks for mt2712 |