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authorThomas Petazzoni <thomas.petazzoni@free-electrons.com>2015-06-09 18:47:11 +0200
committerLinus Walleij <linus.walleij@linaro.org>2015-06-10 13:50:17 +0200
commita361cbc575d6ea778fe3fa6f13246bf34d995519 (patch)
tree2421d58f371d18cb8ad6c5aeb3b7bcab3c6b9856 /Documentation/devicetree/bindings/pinctrl/marvell,armada-xp-pinctrl.txt
parentf32f01e1ba6bca9611c835eb357ce926038128e8 (diff)
downloadlwn-a361cbc575d6ea778fe3fa6f13246bf34d995519.tar.gz
lwn-a361cbc575d6ea778fe3fa6f13246bf34d995519.zip
pinctrl: mvebu: armada-{370,xp}: normalize ethernet txclkout pins
This commit normalizes the naming of the Ethernet txclkout pin to be the same accross Marvell SoCs. It is worth mentioning that the DT binding documentation of the Armada XP was wrong for MPP12: it said the function was ge1(txd0), while it is in fact ge1(txclkout). It is however not really a fix worth sending to stable since it does not change the behavior, and the driver itself was correct. Since only the subnames are changed, DT backward compatibility is not affected. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'Documentation/devicetree/bindings/pinctrl/marvell,armada-xp-pinctrl.txt')
-rw-r--r--Documentation/devicetree/bindings/pinctrl/marvell,armada-xp-pinctrl.txt4
1 files changed, 2 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/pinctrl/marvell,armada-xp-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/marvell,armada-xp-pinctrl.txt
index 561e5190f5ac..0bd7d2f662be 100644
--- a/Documentation/devicetree/bindings/pinctrl/marvell,armada-xp-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/marvell,armada-xp-pinctrl.txt
@@ -18,7 +18,7 @@ only for more detailed description in this document.
name pins functions
================================================================================
-mpp0 0 gpio, ge0(txclko), lcd(d0)
+mpp0 0 gpio, ge0(txclkout), lcd(d0)
mpp1 1 gpio, ge0(txd0), lcd(d1)
mpp2 2 gpio, ge0(txd1), lcd(d2)
mpp3 3 gpio, ge0(txd2), lcd(d3)
@@ -30,7 +30,7 @@ mpp8 8 gpio, ge0(rxd2), lcd(d8)
mpp9 9 gpio, ge0(rxd3), lcd(d9)
mpp10 10 gpio, ge0(rxctl), lcd(d10)
mpp11 11 gpio, ge0(rxclk), lcd(d11)
-mpp12 12 gpio, ge0(txd4), ge1(txd0), lcd(d12)
+mpp12 12 gpio, ge0(txd4), ge1(txclkout), lcd(d12)
mpp13 13 gpio, ge0(txd5), ge1(txd1), lcd(d13)
mpp14 14 gpio, ge0(txd6), ge1(txd2), lcd(d15)
mpp15 15 gpio, ge0(txd7), ge1(txd3), lcd(d16)