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author | Kamal Dasu <kdasu.kdev@gmail.com> | 2020-01-22 16:33:11 -0500 |
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committer | Miquel Raynal <miquel.raynal@bootlin.com> | 2020-03-11 16:21:34 +0100 |
commit | cdc6aba6719b9d7d85c6d411a43345ee12223268 (patch) | |
tree | 0605b48c84bdcae667c7bcd85ebeacd870f11d5c /Documentation/devicetree/bindings/mtd | |
parent | 0d7d6c8183aadb1dcc13f415941404a7913b46b3 (diff) | |
download | lwn-cdc6aba6719b9d7d85c6d411a43345ee12223268.tar.gz lwn-cdc6aba6719b9d7d85c6d411a43345ee12223268.zip |
dt: bindings: brcmnand: Add support for flash-edu
Adding support for EBI DMA unit (EDU).
Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200122213313.35820-2-kdasu.kdev@gmail.com
Diffstat (limited to 'Documentation/devicetree/bindings/mtd')
-rw-r--r-- | Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt index 82156dc8f304..05651a654c66 100644 --- a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt +++ b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt @@ -35,11 +35,11 @@ Required properties: (optional) NAND flash cache range (if at non-standard offset) - reg-names : a list of the names corresponding to the previous register ranges. Should contain "nand" and (optionally) - "flash-dma" and/or "nand-cache". -- interrupts : The NAND CTLRDY interrupt and (if Flash DMA is available) - FLASH_DMA_DONE -- interrupt-names : May be "nand_ctlrdy" or "flash_dma_done", if broken out as - individual interrupts. + "flash-dma" or "flash-edu" and/or "nand-cache". +- interrupts : The NAND CTLRDY interrupt, (if Flash DMA is available) + FLASH_DMA_DONE and if EDU is avaialble and used FLASH_EDU_DONE +- interrupt-names : May be "nand_ctlrdy" or "flash_dma_done" or "flash_edu_done", + if broken out as individual interrupts. May be "nand", if the SoC has the individual NAND interrupts multiplexed behind another custom piece of hardware |